Examples of Using Built-In Nettypes

The examples help you understand how to declare a nettype and user-defined resolution function.

Example: EEnet Driver Module

The following is an example of an EEnet driver module with voltage and resistance driving a node. The driver module is declared as myVRdrvG and the EEnet pin is both driven and measured.

import EE_pkg::*; 
  module myVRdrvG(
    inout EEnet P, 
    input real Vval,     // voltage value to drive to net
    input real Rval,     // resistor value to drive to net
    output real Imeas);  // measured current from pin thru V+R to ground
  assign P = ’{Vval,0.0,Rval};   // drive voltage and resistance onto net
  assign Imeas = (Rval==0)? P.I : (P.V-Vval)/Rval;   // measure current
endmodule

Example: Single-Value Real without Resolution Function

The following is an example of how you can declare a basic SystemVerilog nettype (single-value real) without any resolution function. Nettype can be declared inside or outside the module. This type of declaration can have only a single driver. The real variable or a nettype has a default value of 0 when created. The $display (I1=1.1, I2=0) prints immediately, while the $strobe (I1=1.1, I2=1.1) buffers the print statement and prints after all evaluations have been completed at the end of that time point.

nettype real realnet; //Nettype declaration

module top;
  nettype real realnet;
  real I1 = 1.1;
  realnet I2;
  assign I2 = I1;
  initial begin
    $display("display -> I1=%g, I2=%g", I1, I2);
    $strobe("strobe -> I1=%g, I2=%g", I1, I2);
  end
endmodule

Example: Scalar Real with Built-In Resolution Function

The following is an example of scalar real with a built-in resolution function. The real variable/nettype has a default value of 0 when created. The net w is of user-defined nettype realnet declared with real datatype using the built-in resolution function, CDS_res_wrealsum.

import cds_rnm_pkg::*;

nettype real realnet with CDS_res_wrealsum; //Nettype declaration

module top;
realnet w;
driver1 d1(w);
driver2 d2(w);
receiver r1(w);
endmodule

module receiver(input realnet rec_1);
always @(rec_1)
$display($time , ," outval = %f \n", rec_1);
endmodule

module driver1(output realnet dr_1);
assign dr_1 = 2.2;
endmodule

module driver2 (output realnet dr_2);
real r;
assign dr_2 = r;
initial begin
#10 r = 1.1;
end
endmodule

Example: Typedef Real with Built-In Resolution Function

The following is an example of typedef real with built-in resolution function. Net w is of UDN, myUDN declared with typedef real datatype having a built-in resolution function of CDS_res_wrealsum.

import cds_rnm_pkg::*;

typedef real myreal ;                        //Declaring a UDT
nettype myreal myUDN with CDS_res_wrealsum;  //Nettype declaration

module top;
myUDN w; receiver r1(w);
driver1 d1(w); driver2 d2(w);
endmodule

module receiver(input myUDN rec_1);
always @(rec_1)
$display($time , ," outval = %f \n", rec_1);
endmodule

module driver1(output myUDN dr_1);
assign dr_1 = 2.2;
endmodule

module driver2 (output myUDN dr_2);
real r;
assign dr_2 = r;initial begin
#10 r = 1.1;
end
endmodule

Example: Built-In Nettypes with X and Z States

The following is an example of using built-in nettypes with X and Z states. The net, w is a built-in nettype, wrealavg having resolution function of CDS_res_wrealavg.

import cds_rnm_pkg::*; // Importing the Cadence RNM package
nettype wrealavg realnet; //Renaming wrealavg to realnet

module top;
realnet w; receiver r1(w);
driver1 d1(w); driver2 d2(w);
endmodule

module receiver(input realnet rec_1);

always @(rec_1)
$display($time , ," outval = %f \n", rec_1);
endmodule

module driver1(output realnet dr_1);
real r1; assign dr_1 = r1;
initial begin
r1 = 2.2 ;
#2 r1 = `wrealZState ; #2 r1 = 1.5 ;
#3 r1 = `wrealXState ; #1 r1 = 2.1 ;
end
endmodule

module driver2 (output realnet dr_2);
real r2; assign dr_2 = r2;
initial begin
r2 = 3.3 ;
#1 r2 = `wrealZState ; #3 r2 = 1.3 ;
#2 r2 = `wrealXState ; #2 r2 = 2.1 ;
end
endmodule