Virtually all modern System on Chip (SoC) designs of today are mixed-signal designs. Mixed-signal design is one of the biggest challenges of the modern sub-micron SoC design world. Most systems have to interface their millions of gates, DSPs, memories, and processors to the real world through a display, an antenna, a sensor, or a cable. This means that they have analog and digital content. Until recently, mixed-signal designs could be decomposed into separate analog and digital functions. Today, mixed-signal designs have multiple feedback loops through the analog and digital domains. It is not practical to decompose them into separate functions without losing essential system behavior. This requires an integrated mixed-signal simulation and verification environment.
Cadence introduces a digital-centric mixed-signal verification environment – Digital Mixed-signal (DMS). This new verification environment targets customers using digital centric use models. It refers to, but is not limited to, mixed-signal verification using only digital simulators. In other words, it delivers capabilities to verify the mixed-signal design using digital-centric methodologies.
The Real Number Modeling (RNM) methodology enables you to perform verification of analog or mixed-signal designs using discretely simulated real values. It is a mixed approach, borrowing concepts from analog and digital simulation domain. The values are continuous, floating-point (real) numbers, as in the analog world. However, time is discrete, implying that the real signals change values based on discrete events
This allows simulation using only the digital solver, avoiding the slower analog simulation and enabling intensive verification of mixed-signal design within a short period.