You can use the AMS Designer simulator for mixed-signal simulation in your system-on-chip (SoC) design verification process. You can run xrun to simulate designs containing digital and analog design units. xrun supports hardware description languages such as Verilog and Verilog-AMS, and analog netlist formats such as SPICE and Spectre. You can incorporate SPICE blocks into otherwise Verilog-centric simulations. The program sends analog portions directly to the analog engine for parsing and elaboration. You can perform checks and measurements on design considerations such as dynamic power consumption and current leakage.
For better yield ratio during chip design, you might want to replace some Verilog modules with corresponding SPICE or Spectre subcircuits to achieve device-accurate simulation results during design verification. You can use a port-bind file to specify how you want the software to map port names (scalars and buses) when you replace a Verilog module with a SPICE or Spectre equivalent. You can also reference the original Verilog file so that the software can map the SPICE or Spectre ports by order.