L2R and R2L Connect Modules

Logic-to-Real connect modules (L2R) are similar to Logic-to-Electrical (L2E) connect modules. They are also declared with the keyword connectmodule and contain two ports: one a scalar wreal net (R) and the other a scalar logic net (L). They must be flat and can contain no sub-hierarchies. They take their parameter overrides from the connect rules, just like the L2E connect modules. The internals of the L2R connect modules convert the driven value of one side of the logic/real boundary to the appropriate data type, and drive it to the other side of the boundary.

The L2R and R2L connect modules are defined for unidirectional ports (input and output) and only pass driver information in a single direction as indicated by the port directions.

Here is an example of an L2R connect module:

connectmodule L2R(L, R);
    input L; \logic L;
    output R; wreal_dsp R;

    parameter real vsup = 1.8 from (0:inf);
    parameter real vlo = 0;
    parameter real vhi = vsup from (vlo:vsup);
    parameter real vtlo = vsup / 3;
    parameter real vthi = vsup /1.5;

    wire [31:0] L_val;
    reg [1:0] L_code;
    real L_real;

    initial
        begin
            $BIE_input_strength(L, L_val);
    end

    // Determine the value and strength of L and convert to a real number
    always
        begin
            L_code = L_val & 2'b11;

            case (L_code)
                2'b00: L_real = vlo;
                2'b01: L_real = vsup;
                2'b11: L_real = `wrealXState
                2'b10: L_real = `wrealZState;
            endcase

            @(L_val)
        end

    // drive the converted value back onto the R output pin

assign R = L_real;

endmodule64ce7

Here is an example of an R2L connect module:

connectmodule R2L(L, R);
    output L; \logic L;
    input R; wreal_dsp R;

    parameter real vsup = 1.8 from (0:inf);
    parameter real vlo = 0;
    parameter real vhi = vsup from (vlo:vsup);
    parameter real vtlo = vsup / 3;
    parameter real vthi = vsup /1.5;

    wreal R_val;
    reg R_logic;

    initial
        begin
            $BIE_input_real(R, R_val);
    end

    // Determine the value of R and convert to a logic value
    always
        begin
            if(R_val >= vthi)
                R_logic = 1'b1;
            else if (R_val <= vtlo)
                R_logic = 1'b0;
            else if(R_val === `wrealZState)
                R_logic = 1'bz;
            else
                R_logic = 1'bx;

                        @(R_val);
        end

    // drive the converted value back onto the output L pin
    assign L = R_logic;

endmodule

Currently, R2L/L2R connect modules with mixed-signal and/or mixed-language interactions are not supported.

Inherited connections are allowed inside the L2R and R2L connect modules with the following limitations:

The net you are inheriting from must be a wreal net.

The discipline of the wreal net you are inheriting from must be digital. E2R connect modules are not inserted into L2R connect modules.

The connect module cannot drive a value onto the inherited connection.

If any of these conditions is violated, an error will occur.

The discipline restriction also affects the logic nets. Logic nets in the connect modules cannot inherit from nets with incompatible discipline.

L2R and R2L Connect Modules

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