The following types of port connections can be made through Real-to-Logic (R2L) connect modules:
- A wreal upper connection to SystemVerilog ( SV ) logic output ports
- An SV logic variable or expression upper connection to wreal input ports
- SV real variables or expressions to Verilog-compatible logic nets
Note that this feature does not support the following scenarios:
- A wreal upper connection to an SV logic input port
- An SV logic variable upper connection to a wreal output port
You can insert R2L connect modules in SV scopes, when the upper or lower connection is a variable or expression, and the other is a net. For example, you can connect an SV real variable to a Verilog net input port with logic data type by inserting an R2L connect module. This converts the value of the real variables to a Verilog 4-state logic value, and drives that value onto the net. When you insert an R2L connect module, the mixed-signal elaborator connects the ports.
This feature supports the following port connection scenarios:
The term "variable" refers to a variable identifier such as a scalar, whole array, constant bit select, and constant part select. The term "expression" represents other possible expressions including constants, concatenations, and mutable selects.
- An SV scalar real variable or expression upper connection connected to an SV or Verilog-AMS (VAMS) scalar logic net lower connection port
- If the lower connection port is:
input: Inserts R2L connect module
output: Inserts L2R connect module
- If the upper connection is not an lvalue expression (can be on the left-hand side of a continuous assignment), it is an error
inout: Displays an error
- An SV scalar logic variable or expression upper connection connected to a VAMS scalar wreal net lower connection port
- If the lower connection port is:
input:insert L2R connect module
output:error
inout:error
- A VAMS scalar wreal net upper connection connected to an SV scalar logic variable lower connection port
- If the lower connection port is:
input: error
output: insert L2R connect module
inout: error
- An SV or VAMS scalar logic net upper connection connected to an SV scalar real variable lower connection port
- If the lower connection port is:
input: insert L2R connect module
output: insert R2L connect module
inout:error
- An SV unpacked real variable array or real array expression upper connection connected to an SV or VAMS packed vector logic net lower connection port
- If the lower connection port is:
input:insert R2L connect modules for each element (the lower and upper connection expressions must be of the same size)
output:insert L2R connect modules for each element (the lower and upper connection expressions must be of the same size)
- If the upper connection is not an lvalue expression (can be on the left-hand side of a continuous assignment), it is an error
inout:error
- An SV packed logic variable array or packed logic expression upper connection connected to a VAMS unpacked wreal array net lower connection port
- If the lower connection port is:
input:insert R2L connect modules for each element (the lower and upper connection expressions must be of the same size)
output:error
inout:error
- A VAMS unpacked wreal array net upper connection connected to an SV packed logic variable array lower connection port
- If the lower connection port is:
input:error
output:insert L2R connect modules for each element (the lower and upper connection expressions must be of the same size)
inout:error
- An SV or VAMS packed logic array net upper connection connected to an SV unpacked real variable array lower connection port
- If the lower connection port is:
input:insert L2R connect modules for each element (the lower and upper connection expressions must be of the same size)
output:insert R2L connect modules for each element (the lower and upper connection expressions must be of the same size)
inout:error
Other scenarios involving real connections to logic that are not supported in the SV LRM explicitly, results in an error. Cases where an R2L is required to drive a logic variable also result in an error.