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Common Power Format Language Reference, Version 2.0


7


CPF File Structure




Command Categories

The following table shows how the CPF commands can be categorized.


Category

CPF Command

version command

set_cpf_version

hierarchical support commands                               

set_design


set_instance


end_design


update_design


get_parameter

macro support

set_instance


set_macro_model


end_macro_model


set_analog_ports


set_diode_ports


set_floating_ports


set_pad_ports


set_power_source_reference_pin


set_wire_feedthrough_ports

general purpose commands

find_design_objects


include


set_array_naming_style


set_hierarchy_separator


set_power_unit


set_register_naming_style


set_time_unit

verification support commands

assert_illegal_domain_configurations                     


create_assertion_control

simulation support commands

set_sim_control

mode and power mode commands

set_power_mode_control_group


end_power_mode_control_group


create_mode


create_power_mode


create_mode_transition


update_power_mode

design and implementation constraints

create_analysis_view


create_bias_net


create_global_connection


create_ground_nets


create_isolation_rule


create_level_shifter_rule


create_nominal_condition


create_operating_corner


create_pad_rule


create_power_domain


create_power_nets


create_power_switch_rule


create_state_retention_rule


define_library_set


identify_always_on_driver


identify_power_logic


identify_secondary_domain


set_equivalent_control_pins


set_input_voltage_tolerance


set_power_target


set_switching_activity


update_isolation_rules


update_level_shifter_rules


update_nominal_condition


update_power_domain


update_power_switch_rule


update_state_retention_rules

library-related commands

define_always_on_cell

define_global_cell

define_isolation_cell

define_level_shifter_cell


define_open_source_input_pin


define_pad_cell


define_power_clamp_cell


define_power_clamp_pins


define_power_switch_cell


define_related_power_pins


define_state_retention_cell


It is recommended to define the library-cell related commands in a separate file which can be sourced in the CPF file (using the include command) in a higher-level CPF file.



Typical Command Usage

To perform functional verification, you need the following minimum set of commands to specify the power structures when starting from RTL:

set_design
end_design
set_macro_model
end_macro_model
create_power_domain
create_nominal_condition
create_power_mode
create_state_retention_rule
create_isolation_rule

To drive synthesis and test, you need at least the following commands in addition to the commands listed above:

define_library_set
define_isolation_cell
define_level_shifter_cell
define_state_retention_cell
update_nominal_condition
update_power_mode

To drive physical implementation and signoff analysis, you need at least the following commands in addition to all commands listed above:

create_power_nets
create_ground_nets
create_power_switch_rule
update_power_domain
create_operating_corner
create_analysis_view



Command Dependency

Some CPF commands reference objects defined in previous commands. This implies that a certain command order is required. If this order is violated, an error will be issued.


CPF Command

Defines

References

Order

set_cpf_version

version

--

first (if specified)

include

other CPF specification


can be anywhere

set_array_naming_style

set_hierarchy_separator

set_register_naming_style

name mapping
of design objects


after set_design and before any commands that reference design objects

set_power_unit

power unit


after set_design

set_time_unit

time unit


after set_design

define_library_set

library set

library

after set_cpf_version (if specified)

define_always_on_cell

always on buffer


if needed, after define_library_set

define_global_cell

global cell


if needed, after define_library_set

define_isolation_cell

isolation cell


if needed, after define_library_set, before update_isolation_rules

define_level_shifter_cell

level shifter


if needed, after define_library_set

define_open_source_input_pin

open source input pin


if needed, after define_library_set

define_power_clamp_cell

power clamp cell


if needed, after define_library_set

define_power_switch_cell

power switch


if needed, after define_library_set

define_state_retention_cell

retention cell


if needed, after define_library_set, before update_state_retention_rules

define_pad_cell

pad cell


if needed, after define_library_set

define_power_clamp_pins

cell pin with built-in clamp


if needed, after define_library_set

define_related_power_pins

relationship between power and data pins


if needed, after define_library_set

set_design


design or module

after library-related specifications, but before design-related specifications related to top design

set_instance


hierarchical
instance


find_design_objects



after set_design

get_parameter


parameters in set_design

after set_design

create_power_domain

power domain


after set_design

create_nominal_condition

nominal condition


after set_design

set_power_mode_control_group

power mode control group

power domain

after create_power_domain

end_power_mode_control_group

end of power mode control group definition



create_mode

generic mode

power domain nominal condition

after create_power_domain and create_nominal_condition

create_power_mode

power mode

power domain nominal condition

after create_power_domain and create_nominal_condition

assert_illegal_domain_configurations

illegal power mode

power domain nominal condition

after create_power_domain and create_nominal_condition

create_isolation_rule

isolation rule

power domain

after create_power_domain

create_level_shifter_rule

level shifter rule

power domain

after create_power_domain

create_pad_rule

pad rule

power domain

after create_power_domain

create_ground_nets

ground net

ground net

after set_design

create_power_nets

power net

power net

after set_design

create_power_switch_rule

power switch rule

power domain
power net
ground net

after create_power_domain and create_power_nets and create_ground_nets

create_state_retention_rule

state retention rule

power domain

after create_power_domain

create_mode_transition

transition mode

power mode

after create_power_mode

create_assertion_control



after create_power_domain

set_sim_control



after create_power_domain and create_xx_rule

identify_always_on_driver

always on driver



identify_power_logic

isolation logic


after set_design

identify_secondary_domain

secondary domain


after set_design

set_equivalent_control_pins

equivalent pins

pins

after create_power_domain, create_isolation_rule and create_state_retention_rule

set_switching_activity

activities

pins

after set_design

create_operating_corner

corner


after define_library_set

create_analysis_view

analysis view

view

after create_power_mode and create_operating_corner

set_power_target



after set_power_unit

set_macro_model

custom IP



set_floating_ports


ports

after set_macro_model

set_input_voltage_tolerance

bias voltage

ports

after set_macro_model

set_wire_feedthrough_ports

physical connection

ports

after set_macro_model

set_analog_ports

analog port

ports

after set_macro_model

set_diode_ports

diode port

ports

after set_macro_model

set_pad_ports

pad port

ports

after set_macro_model

set_power_source_reference_pin

voltage reference pin

ports

after set_macro_model

end_macro_model

end of macro definition



update_design




update_nominal_condition


nominal condition

after create_nominal_condition

update_power_domain


power domain

after create_power_domain

update_power_mode



after create_power_mode

update_isolation_rules



after create_isolation_rule

update_level_shifter_rules



after create_level_shifter_rule

update_power_switch_rule



after create_power_switch_rule

update_state_retention_rules



after create_state_retention_rule

create_bias_net

bias net

bias net

after set_design

create_global_connection


power domain
bias net
power net
ground net

depending on nets connected and options used, after
create_power_domain, create_bias_net, create_ground_nets, create_power_nets

end_design

end of CPF file


last command in each CPF file.





Information Precedence




Information Inheritance

The general purpose commands are scope sensitive:

set_array_naming_style 
set_cpf_version
set_hierarchy_separator
set_register_naming_style
set_time_unit
set_power_unit

By default, the scope inherits the values of the previous scope.

You can change the values for the current scope, but these values only apply as long as you are within the scope.

Example

Assume the following design hierarchy:

Top

A_inst

A1_inst

# the following command sets the hierarchy separator to / for all scopes
set_hierarchy_separator /
set_design Top
# the following command changes the hierarchy separator from / to . for Top
set_hierarchy_separator .
set_instance A_inst
set_design A
...                           
# the current scope inherits . as the hierarchy separator
# the following command changes the hierarchy separator to / for the current scope
set_hierarchy_separator /                            
...
end_design                            
# the scope changes to Top and the hierarchy separator changes back to .                            
# because . is the hierarchy separator for Top
...
set_instance A_inst.A1_inst
# the following command changes the hierarchy separator to / for the current scope
set_hierarchy_separator /
set_design A1
...                       
end_design
# the scope changes to Top and the hierarchy separator changes back to .                            
# because . is the hierarchy separator for Top
...
end_design



Object References

CPF commands reference design and CPF objects. An object reference is always relative to the current scope (part of the design that is visible).

By default, the scope starts at the top design and by default all elements in the design hierarchy are visible. You can change the scope using the set_instance command. After a set_instance command, the scope is reduced to a portion of the design.

You can only reference objects within the current scope or in a lower scope. The current scope is always considered to be the top. Top level does not necessarily refer to the top level of the design. In the current scope, top refers to the topmost level of the hierarchy of the scope.

To reference an object that is part of the current scope, you can use its name.

To reference an object that is below the current scope, specify the hierarchical name (path to the object). The object reference starts from the top of the scope. Therefore you can omit the hierarchical separator at the beginning of a path which denotes the top of the current scope.

Note:  If your current scope is the root-level hierarchy and the root-level hierarchy has multiple top modules, the search for design objects starts from all top modules.



Referencing Design Objects

Referencing a Pin or Port

Whenever you reference a pin or port in an expression, either

Referencing a Power Supply Net

When you reference a power supply net, either

Referencing RTL registers

To reference RTL registers, use the RTL register name. For arrays of registers, you can also use indexes to select bits of the array.

Examples

Assume the following RTL:

reg [5:4][3:2] c;
reg c1;

Referencing Verilog Generated Instances

To reference a Verilog generated instance, follow the Verilog-2001 naming style for generated instances.

Example

Assume the following RTL:

parameter SIZE = 2; 
genvar i, j, k, m;
generate
    for (i=0; i<SIZE+1; i=i+1) begin:B1 // scope B1[i]
        M1 N1(); // instantiates B1[i].N1
        for (j=0; j<SIZE; j=j+1) begin:B2 // scope B1[i].B2[j]
        M2 N2(); // instantiates B1[i].B2[j].N2
            for (k=0; k<SIZE; k=k+1) begin:B3 // scope B1[i].B2[j].B3[k]
            M3 N3(); // instantiates B1[i].B2[j].B3[k].N3
            end
        end
        if (i>0)
            for (m=0; m<SIZE; m=m+1) begin:B4 // scope B1[i].B4[m]
            M4 N4(); // instantiates B1[i].B4[m].N4
        end
    end
endgenerate

The generated instance names that should be used are:

The following command references the registers in the generated instances B1[0].N1 and B1[1].N1.

create_state_retention_rule -name sr1 ... -instances {B1[*].N1.q*}

Referencing an Instance

When you reference a hierarchical instance, the instance and all of its children will be selected.

Consider the following rule for the following hierarchy

create_state_retention_rule -name sr1 -instances A/A* -exclude A/A3
Top
    A
        A1
            flop
        A2
            flop
        A3
            flop
        B

The -instances option selects instances A1, A2 and A3 in hierarchical instance A. However since A1, A2 and A3 are hierarchical instances themselves, this command selects the leaf-level flops in A1, A2 and A3. The -exclude option removes A/A3/flop from the selected list.



Referencing CPF Objects

Assume a design with the following hierarchy:

Top
    Inst1 (mod1)
    Inst2 (mod2)
        Inst3 (mod3)
        Inst4 (mod4)

The names in parentheses are the corresponding module names. Consider the following CPF file:

1.  set_design Top
2. create_power_domain -name PD1 -default
3. create_power_domain -name PD2 -instances Inst1
4. set_instance Inst2
5.  set_design mod2
6. create_power_domain -name PD1 -instances Inst3
7. create_isolation_rule -name ir1 -from PD1 -isolation_condition standby1
8. create_isolation_rule -name ir2 -from PD2 -isolation_condition standby2
9. create_power_domain -name PD3 -instances Inst4
10. end_design
11. create_isolation_rule -name ir3 -from PD1 -isolation_condition standby3
12. create_level_shifter_rule -name lsr1 -from Inst2.PD1
13. create_state_retention_rule -name srr1 -domain PD3 ...
14. end_design

In this CPF file, two power domains with the same name PD1 are created (lines 2 and 6). This is allowed because they are created in two different scopes.

When referencing power domain PD1 inside scope Inst2 (line 7), the only matching power domain is the power domain PD1 created on line 6.

Referencing power domain PD2 on line 8 causes an error, because there is no power domain created with name PD2 in the scope of Inst2.

Referencing power domain PD3 on line13 also causes an error because power domain PD3 was not created at the top level, even though a power domain PD3 was created inside scope Inst2 (line 9).

To reference power domain PD1 defined for scope Inst2 from the top level, the hierarchical path name of object PD1 with respect to the current scope (top level) must be used (line 12).


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