What's Changed from CPF 1.1 to CPF 2.0
New Features
New Concepts
Introduced Concept of Power Source Domain
Introduced the Concept of Global Cell
Introduced the Concept of Generic Mode
Introduced Concept of Power Design
Introduced Concept of Input and output Domains for Level Shifter Cells
Introduced Concept of Power Source Domain
Introduced the concept of a power source domain, that is a power domain that contains the output supply of a voltage regulator.
Introduced the Concept of Global Cell
The global cell replaces the always-on cell. Like the always-on cell, the global cell is a special cell that has secondary power or ground pins in addition to the primary power and ground pins (followpins). In some cell designs, when the primary power or ground are switched off, the cell function can be different from the normal function when the primary power and ground are on. Also, in some cases, the cell can also have isolation logic built in at the cell input pins.
To support this new cell, the
define_global_cellcommand was added.Introduced the Concept of Generic Mode
Introduced the concept of a generic mode (also referred to as mode), which is a static state of a design that performs one or more intended design functions. Typically, it is determined by the states of memory elements, states of power domains, and signal values.
To create a generic mode that applies to a subset of domains, the
create_modecommand was added.Introduced Concept of Power Design
Introduced the concept of a power design, that is a unique power structure that can be associated with either a top design, or with one or more logic modules.
Introduced Concept of Input and output Domains for Level Shifter Cells
Inputs and output domains are the domains whose primary power and ground nets are connected to the input and output supply of the level shifter cells.
Introduced Concept of Domain Crossing
A domain crossing is a connection between one driver and one load in two different power domains. This concept replaces the net segment terminology which was not as precise and implied that multiple isolation cells could be inserted on the same crossing. Using the concept of domain crossing, clearly indicates that insertion of isolation cells and level shifters occurs on a full crossing basis.
Power Domain Changes
Added Support for Assigning Leaf-level Library Cell instances to Power Domains
Made Instance and Boundary Port Specification in Domain Specification More Flexible
Added Support for Assigning Leaf-level Library Cell instances to Power Domains
In CPF 1.1, you could only specify instances of hierarchical modules and macro cells for the
-instancesoption of thecreate_power_domaincommand. In CPF 2.0, the semantics have been expanded to allow instances of any library cells.Made Instance and Boundary Port Specification in Domain Specification More Flexible
To support this feature, the
-exclude_instancesand-exclude_portsoptions were added to thecreate_power_domaincommand.Added Flexibility to Update the Members of a Power Domain
The
-instancesand-boundary_portsoptions were added to theupdate_power_domainto allow appending newly-created instances and ports to the member list of a previously created power domain.
Hiearchical Flow Improvements
Added Support for Analog Ports in Macro Models
Added Support for Specification of Macro Cell Ports Connected to Bonding Ports
Added Support for Specification of Macro Cell Ports Connected to Diode Cells
Added Capability to Create a Single Macro Model that can Apply to Multiple Cells
Changed Semantics for set_design
Added Support to Link Multiple HDL Modules to a Power Design
Appending Power Intent to an Existing Design
Expanded Semantics for Virtual Ports
Added Support for Analog Ports in Macro Models
The
set_analog_portscommand allows you to specify a list of analog signal pins that must also be connected to pins declared as analog in other macro models or in pad cells.Added Support for Specification of Macro Cell Ports Connected to Bonding Ports
To specify a set of macro cell ports that can directly connect to a bonding port at the chip level, the
set_pad_portscommand was added. No low power logic (such as level shifters and isolation cells) can be inserted between the top-level bonding ports and the pad ports of a macro.Added Support for Specification of Macro Cell Ports Connected to Diode Cells
To specify a list of pins of a macro cell that connect to the positive and negative pins of a diode, the
set_diode_portscommand was added.Added Capability to Create a Single Macro Model that can Apply to Multiple Cells
To formally allow a single macro model to apply to more than one cell, the
-cellsoption was added to theset_macro_modelcommand. For example, memory cells with the same architecture but different bits can use the same macro cell definition.This option also facilitates better error checking in cases where the wrong macro model was applied to an instance of a cell.
Changed Semantics for set_design
The semantics of the
set_designcommand have been changed:
CPF1.1 specified the power intent for one module.
CPF2.0 specifies an entity, referred to as a power design, that defines power intent. A power design may be applied to any of the following:
Added Support to Link Multiple HDL Modules to a Power Design
The
-modulesoption was added to theset_designcommand to associate multiple HDL modules to a power design.Appending Power Intent to an Existing Design
CPF1.1 appends power intent to an existing design using additional
set_designend_designpairsCPF2.0 appends power intent to an existing power design using the new
update_designcommand paired withend_designExpanded Semantics for Virtual Ports
In CPF 1.1, the
-portsoption of theset_designcommand specified input ports only.In CPF 2.0, new options explicitly specify
-input_ports,-output_ports, and-inout_ports.Note: The existing
-portsoption still exists for backward compatibility.Clarified Semantics for Instance Port Mapping
The semantics of the
-port_mappingoption of theset_instancecommand have been clarified to include the specification of real ports (such as macro model pins) in addition to virtual ports.
Isolation Enhancements
Added Support for Isolation Cell That Can be Placed in Power and Ground Shutoff Domain
Added Support for Isolation Cell That Can Be Placed in Any Domain
Added Support for Clamp-Type Isolation Cell
Added Support for Isolation Cell with Synchronous Enable Control
Added Support to Enable Multi-bit Isolation Cells
Changed Semantics of Location in Rules
Added Capability to Specify A Model for Special Isolation Logic
Changed Semantics of -within_hierarchy in Rules
Added Support for Isolation Logic That Can Be Placed in Parent Hierarchy
Added Capability to Force the Insertion of Isolation Logic
Added Support for Isolation Cell That Can be Placed in Power and Ground Shutoff Domain
To support these type of isolation cells, the
define_isolation_cellcommand can be specified with both the-power_switchableand-ground_switchableoptions.Added Support for Isolation Cell That Can Be Placed in Any Domain
Isolation cells without power and ground pins that connect through abutment of the cells (followpins), that is, with only a secondary power and ground pin can be placed in any domain.
To support this type of isolation cell, the following changes were made to the
define_isolation_cellcommand:
Added the
anyvalue for the-valid_locationoptionThe command can be specified without the
-power_switchableand-ground_switchableoptionsImplementation tools must connect the secondary power and ground pin of this isolation cell to the supplies of the secondary domain of the rule. For more information, see Secondary Power Domain of Isolation Instances. Implementation tools must also ensure that placement of these cells does not break the follow pin connection of the other cells that are placed in the same standard cell row.
Added Support for Clamp-Type Isolation Cell
To support clamp-type isolation cells, the following changes were made:
Added the
-clampoption to thedefine_isolation_cellcommand.Added the
clamp_highandclamp_lowvalues for the-isolation_outputoption of thecreate_isolation_rulecommand.Added Support for Isolation Cell with Synchronous Enable Control
To support isolation cells with synchronous enable control, the following changes were made:
Added the
-aux_enablesoption to thedefine_isolation_cellcommand.Added the
-isolation_controloption to thecreate_isolation_rulecommand.Added Support to Enable Multi-bit Isolation Cells
Added the
-pin_groupsoption to thedefine_isolation_cellcommand.Changed Semantics of Location in Rules
Previously, when you specified the
-locationand-cellsoptions together in theupdate_isolation_rulescommand, the-cellsoption took precedence--the location of the cells was determined by the-valid_locationspecification in thedefine_isolation_cellcommand.In CPF 2.0, if you specify the
-locationand-cellsoptions together in theupdate_isolation_rulescommand, the value of the-locationoption must match the value specified for the-valid_locationin thedefine_isolation_cellcommand. Otherwise an error will be given.Added Capability to Specify A Model for Special Isolation Logic
Added the
-use_modelto theupdate_isolation_rulescommand to indicate that a simulation tool must use the functional model of the first cell specified in the-cellsoption. The-pin_mappingoption was added to specify the connection between the pins of the functional model and the pins or ports in the design. If a macro model exists for the functional model, the-domain_mappingoption can be used to specify the mapping between the domains in the macro model and the domains in the design.Changed Semantics of -within_hierarchy in Rules
Previously, when you specified the
-within_hierarchyoption in theupdate_isolation_rulescommand, the power domain of the specified instance had to match the power domain of the default location or the location specified with the-locationoption.In CPF 2.0, the power domain of the specified instance no longer needs to match the power domain specified by the
-locationoption. The power domain of the instance specified with the-within_hierarchyoption takes precedence.This change allows you to insert the isolation logic in a power domain that is neither the from nor the to power domain. This may be needed when the physical constraints require the placement of the isolation in a separate domain.
Also, if you specify the
-within_hierarchyand-cellsoptions together, the-valid_locationof the cells specified in thedefine_isolation_cellcommand must be compatible with the power domain of the hierarchical instance specified with the-within_hierarchyoption in theupdate_isolation_rules. Otherwise an error will be given.Added Support for Isolation Logic That Can Be Placed in Parent Hierarchy
To support the placement of isolation logic in the logic hierarchy of the parent instance of the nets selected using the
-from,-to, and-pinsoptions in thecreate_isolation_rulecommand, theparentvalue can now be specified for the-locationoption of theupdate_isolation_rulescommand.Added Capability to Force the Insertion of Isolation Logic
To support forced insertion, the
-forceoption was added to thecreate_isolation_rulecommand. You must specify the-forceoption with a-pinsoption. If you specify a-toor-fromoption with the-forceoption, they will be ignored.If you use the
-force option to create the isolation rule, the isolation logic can only be inserted in the default location or in the parent hierarchy ( see the-locationoption of theupdate_isolation_rulescommand).Added Capability to Specify a Name Suffix
To specify the name suffix to be used when creating the isolation logic, the
-suffixoption was added to theupdate_isolation_rulescommand.
Level Shifter Enhancements
Added Support for Level Shifter Cell That Can Be Placed in Any Domain
Added Support for Bypass Level Shifter
Added Support to Specify Lists for Input and Output Voltages in Level Shifter Definition
Added Support for Multi-Stage Level Shifters
Added Support to Enable Multi-bit Cells
Changed Semantics of Location in Rules
Expanded Support for Input Voltage Tolerance
Changed Semantics of -within_hierarchy in Rules
Added Support for Level Shifters That Can Be Placed in Parent Hierarchy
Added Capability to Force the Insertion of Level Shifter Logic
Added Support for Level Shifter Cell That Can Be Placed in Any Domain
Level shifter cells whose input and output pins are specified as non-followpins can be placed in any domain.
To support this type of level shifter cell, the
anyvalue was added for the-valid_locationoption of thedefine_level_shifter_cellcommand.If the valid location of a level shifter cell is
any, it can be used in a rule using -within_hierarchywith any hierarchy location.Added Support for Bypass Level Shifter
To support bypass level shifters, the following changes were made:
Added the
-bypass_enableoption to thedefine_level_shifter_cellcommandAdded the
-bypass_conditionoption to thecreate_level_shifter_rulecommand.Added Support to Specify Lists for Input and Output Voltages in Level Shifter Definition
In previous releases, you needed to specify either a single voltage or a voltage range for the input (source) and output (destination) supply voltages. However, when specifying ranges, some unintended input and output combination could be implied. Consider the following option combination in the
define_level_shifter_cellcommand:-input_voltage_range 0.8:1.0:0.2 -output_voltage_range 1.0:1.2:0.2 This could imply that the level shifter can shift from 0.8 to 1.2, while the level shifter can only shift from either 0.8 to 1.0 or from 1.0 to 1.2.
In CPF 2.0, you can specify lists of voltages and voltage ranges. If you specify a list of voltages or ranges for the input supply voltage, you must also specify a list of voltages or voltage ranges for the output supply voltage. Both lists must be ordered and have the same number of elements. That is, each member in the list of input voltages (or ranges) has a corresponding member in the list of output voltages (or ranges).
Added Support for Multi-Stage Level Shifters
To support multi-stage level shifters, the following changes were made:
Added
-multi_stageoption to thedefine_level_shifter_cellcommand.Added the
-throughoption to theupdate_level_shifter_rulescommand which specifies the subsequent domains for the multi-stage level shifting between the first domain (specified with-from) and the last domain (specified with-to).Added Support to Enable Multi-bit Cells
Added the
-pin_groupsoption to thedefine_level_shifter_cellcommand.Changed Semantics of Location in Rules
Previously, when you specified the
-locationand-cellsoptions together in theupdate_level_shifter_rulescommand, the-cellsoption took precedence--the location of the cells was determined by the-valid_locationspecification in thedefine_level_shifter_cellcommand.In CPF 2.0, if you specify the
-locationand-cellsoptions together in theupdate_level_shifter_rulescommand, the value of the-locationoption must match the value specified for the-valid_locationin thedefine_level_shifter_cellcommand. Otherwise an error will be given.Expanded Support for Input Voltage Tolerance
In previous versions of CPF, the input voltage tolerance could only be specified for input pins of a macro model.
In CPF 2.0, the concept has been generalized for all input pins. You can also specify a different tolerance for power and ground voltages. You can specify the pins or the domain to which the constraints apply. If the input voltage tolerance is violated, a power or ground level shifter is required for the specified pins.To support these new features the syntax of the
set_input_voltage_tolerancecommand was revised.Changed Semantics of -within_hierarchy in Rules
Previously, when you specified the
-within_hierarchyoption in theupdate_level_shifter_rulescommand, the power domain of the specified instance had to match the power domain of the default location or the location specified with the-locationoption.In CPF 2.0, the power domain of the specified instance no longer needs to match the power domain specified by the
-locationoption. The power domain of the instance specified with the-within_hierarchyoption takes precedence.This change allows you to insert level shifters in a power domain that is neither the from nor the to power domain. This may be needed when the physical constraints require the placement of the level shifter in a separate domain.
Also, if you specify the
-within_hierarchyand-cellsoptions together, the-valid_locationof the cells specified in thedefine_level_shifter_cellcommand must be compatible with the power domain of the hierarchical instance specified with the-within_hierarchyoption of theupdate_level_shifter_rulescommand. Otherwise an error will be given.Added Support for Level Shifters That Can Be Placed in Parent Hierarchy
To support the placement of level shifters in the logic hierarchy of the parent instance of the nets selected with the
-from,-to, and-pinsoptions in thecreate_level_shifter_rulecommand, theparentvalue can now be specified for the-locationoption of theupdate_level_shifter_rulescommand.Added Capability to Force the Insertion of Level Shifter Logic
To support forced insertion, the
-forceoption was added to thecreate_level_shifter_rulecommand. You must specify the-forceoption with a-pinsoption. If you specify a-toor-fromoption with the-forceoption, they will be ignored.If you use the
-force option to create the level shifter rule, the level shifters can only be inserted in the default location or in the parent hierarchy ( see the-locationoption of theupdate_level_shifter_rulescommand).Added Capability to Specify Input and Output Domains for the Level Shifter Cells
To specify the input and output domains for a level shifter the
-input_domainand-output_domainoptions were added to thecreate_level_shifter_rulecommand.Added Capability to Specify a Name Suffix
To specify the name suffix to be used when creating the level shifters, the
-suffixoption was added to theupdate_level_shifter_rulescommand.
State Retention Enhancements
Added Capability to Specify A Model for Special State Retention Logic
Added Support for Retention Check and Precondition
Added Capability to Preserve Output While Power is Off
Added Capability to Require the Implementation of Retention Logic
Added Capability to Specify A Model for Special State Retention Logic
Added the
-use_modelto theupdate_state_retention_rules command to indicate that a simulation tool must use the functional model of the first cell specified in the-cellsoption. The-pin_mappingoption was added to specify the connection between the pins of the functional model and the pins or ports in the design. If a macro model exists for the functional model, the-domain_mappingoption can be used to specify the mapping between the domains in the macro model and the domains in the design.Added Support for Retention Check and Precondition
In CPF 2.0, a
-retention_preconditionoption was added to thecreate_state_retention_rulecommand and a-retention_checkoption to thedefine_state_retention_cellcommand.Added Capability to Preserve Output While Power is Off
To prevent the corruption of the output of the state retention logic when the primary power is off, the
-use_secondary_for_outputoption was added to thecreate_state_retention_rulecommandAdded Capability to Require the Implementation of Retention Logic
To require the implementation of retention logic, the
-requiredoption was added to thecreate_state_retention_rulecommand.
Power Mode and Power Mode Control Group Changes
Power Mode Control Group Semantic Change
Added Capability to Specify Illegal Power Mode Transitions
Added Capability to Associate Assertions with Power Mode Transitions
Power Mode Control Group Semantic Change
When compound power modes are specified, a design can be in more than one mode at a time. This can cause problems during verification when deterministic domain states are expected.
By allowing a power domain to be specified in multiple power mode control groups, this problem can be solved.
Note: In CPF 1.1, a power domain could only belong to one power mode control group.
Added Capability to Specify Illegal Power Mode Transitions
To support this feature, the
-illegaloption was added to thecreate_mode_transitioncommand.Added Capability to Associate Assertions with Power Mode Transitions
To support this feature, the
-assertionsoption was added to thecreate_mode_transitioncommand.Added Capability to Specify Condition for Power Mode
In CPF 2.0, the
-conditionoption was added to thecreate_power_modecommand to indicate when the design is in the specified mode.This option is only interpreted by the simulation and verification tools.
Pad and Regulator Modeling Changes
Simplified Pad Modeling
Until now, you could only use a CPF macro model to model the IO pads. This method can be tedious and error-prone.
The
define_pad_cellcommand allows you to create a model for simple pad cells. This command allows you to identify
Pins that will be directly or indirectly connected to the board
Pins which connect to the core and have internal isolation logic and their corresponding isolation control signal
Groups of pins that belong to the same power domain
Analog signal pins that connect to other analog pins
This model is not sufficient when your pad cell contains any of the following:
Internal power switch and/ or state retention
Complex internal isolation control
Internal feed- through nets for data signals
In this case, you need to use a CPF macro model for the pad cell.
Simplified Pad Instantiation
The
create_pad_rulecommand allows you to specify the mapping to a top-level domain of eitherImproved Capability to Model an On-Chip Voltage Regulator
To model a voltage regulator the following features were added:
Introduced the concept of a power source domain, that is a power domain that contains the output supply of the voltage regulator.
Added the
-power_sourceoption to thecreate_power_domainto identify a power source domain.Added the
set_power_source_reference_pincommand to identify an input pin of a macro model as the voltage reference of the voltage regulator.Allowed specification of voltage ranges in the
create_nominal_conditioncommand.
Simulator-Related Changes
Added Capability to Specify Simulator Action when Power Domain is Switched off or Restored
Added Capability to Specify a CPF Model for a Testbench
Added Capability to Specify Simulator Action when Power Domain is Switched off or Restored
To allow users to specify the immediate action to be taken when the power is switched off in power domains or restored to power domains, the
set_sim_controlcommand was added.For example, initial statements are non-synthesizable code used in simulation to create proper startup conditions at time zero of the simulation. Previous CPF versions had no provision to specify the action to be taken when the power is restored to a switchable power domain. This time is very similar to initialization of the simulation at time zero.
Added Capability to Specify a CPF Model for a Testbench
To support this feature, the
-testbenchoption was added to theset_designcommand.Added Control over Signal Values in a Power Off Domain
To control the signal values of elements in a power domain when this domain is being switched off, the
-power_down_statesoption was added to thecreate_power_domaincommand.
Other Improvements
Added Capability to Specify Inverted Polarity for Equivalent Control Pins
Added Capability to Specify Libraries Specific to Power Analysis
Improved Support for Clamp Diodes
Improved Support for Open Source Pin
Added Support for Deep Nwell and Deep Pwell
Added Additional Operators for Boolean Expressions
Added Capability to Specify a Global Connection using Ports or Liberty PG Type
Expanded Definition of Library Set for Operating Corners
Added Capability to Specify a Default Analysis View
Added Capability to Find Design Objects within a Specified Scope
Added Capability to Specify Inverted Polarity for Equivalent Control Pins
By allowing specification of equivalent pins with inverted polarity in the
set_equivalent_control_pinscommand, insertion of special low power logic during synthesis can sometimes be simplified by using a control signal with the opposite polarity.For example, with previous versions of CPF, when a limited number of isolation cells is available in the library, a combination of some conditions in the isolation rules might require the addition of an inverter to the control enable line. By using a control signal with the opposite polarity, the inverter is no longer needed.
Added Capability to Specify Libraries Specific to Power Analysis
To support this feature, the
-power_library_setoption was added to thecreate_operating_cornerandupdate_nominal_conditioncommands.Improved Support for Clamp Diodes
Previous versions of CPF only supported power clamp cells with one data pin.
To improve the support of clamp diodes, the
define_power_clamp_cellwas superseded by the newdefine_power_clamp_pinscommand.
Power, ground, and power and ground clamp cells with one or more data pins
Complex cells that can have input pins with built-in clamp diodes
Improved Support for Open Source Pin
Added the
-typeoption to thedefine_open_source_input_pincommand to specify the type of the transistor connected to the pin within the cell.Added Support for Deep Nwell and Deep Pwell
Added the
-deep_nwelland-deep_pwelloptions to specify bias nets in theupdate_power_domaincommand.Added the
-deep_nwell_voltageand-deep_pwell_voltageoptions to thecreate_nominal_conditioncommand.Added Additional Operators for Boolean Expressions
The following bit-wise and logical operators are now allowed in CPF Boolean expressions:
~ ^ && ||Added Capability to Specify a Global Connection using Ports or Liberty PG Type
The
create_global_connectioncommand allows specification of a global connection between
the top-level module ports
an instance's cell pins by matching the
pg_typein the corresponding Liberty definitions of the cell pinsExpanded Definition of Library Set for Operating Corners
The
create_operating_cornercommand now facilitates MMMC analysis and optimization by allowing the specification of more than one library set in the-library_setoption.Added Capability to Specify a Default Analysis View
The -default option was added to the
create_analysis_viewcommand to specify the default binding of libraries for different corners to the corresponding power domains.Added Capability to Find Design Objects within a Specified Scope
To locate and return design objects which can then be used as arguments to other CPF commands, the
find_design_objectscommand was added.
Command Change Summary
Renamed Command Options
set_input_voltage_tolerance-ports-pins-bias [lower:]upper-power lower[:upper]-ground [lower:]upper
New Commands
create_mode create_pad_rule define_global_cell define_pad_cell define_power_clamp_pins find_design_objects set_analog_ports set_diode_ports set_pad_ports set_power_source_reference_pin set_sim_control update_design
New Command Options
Other Syntax Changes
Semantics Changes
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