Index
Symbols
,... in syntax

... in syntax

[] in syntax

{} in syntax

| in syntax

A
abutment pins

B
blockages, simplified

braces in syntax

brackets in syntax

description, DEF

C
peripheral

wire-to-ground

combining blockages

escape

information

description, DEF

user-defined arguments

,

user-entered text

COVER model, definition in LEF

D
converting LEF values to integer values

example

syntax overview

PINS

DEF syntax and description
BUSBITCHARS

COMPONENTS

DESIGN

DIEAREA

DIVIDERCHAR

,

GCELLGRID

GROUPS

HISTORY

NETS

PROPERTYDEFINITIONS

REGIONS

ROW

SPECIALNETS

TECHNOLOGY

TRACKS

,

UNITS DISTANCE MICRONS

VERSION

VIAS

description, DEF

diagonal vias, recommendation for RGrid

description, DEF

description, DEF

,

E
edge capacitance

EEQ statement, LEF syntax

electrically equivalent models, LEF syntax

endcap models, definition in LEF

electrically equivalent (EEQ)

escape character

F
LEF

LEF syntax

offset between LEF and GDSII

G
restrictions

uniform, in DEF

description, DEF

description, DEF

H
description, DEF

I
INOUT pins, netlist

INPUT pins, netlist

italics in syntax

L
LAYER (nonrouting) statement
description, LEF

,

for LEF via descriptions

routing order in LEF

example

distance precision

line length

overview

routing layer order

overview

LEF syntax and description
LAYER, nonrouting

,

MACRO

NONDEFAULT rule

OBS, macro obstruction

PIN macro

PROPERTYDEFINITIONS

SITE

UNITS

VERSION

VIA

VIARULE

VIARULE viaRuleName GENERATE

LEF values converted to integer values

legal characters

library design, simplifying blockages

literal characters

M
macro obstruction, OBS statement
description, LEF

description, LEF

description, LEF

models, site orientation

mustjoin pins

N
INOUT

INPUT

OUTPUT

mustJoin nets

description, DEF

NONDEFAULT rule statement
description, LEF

O
OBS (macro obstruction) statement
description, LEF

obstructions, simplified

Or-bars in syntax

models

pin

,

OUTPUT pins, netlist

overlaps, specifying in LEF

P
peripheral capacitance

description, LEF

abutment

direction in LEF

external, DEF

feedthrough pins in LEF

INOUT

INPUT

modeling in LEF

mustjoin

netlist

orientation

,

OUTPUT

power geometries

ring

using in LEF

syntax, DEF

PITCH parameter, ratio in three-layer design

placement site function, SITE statement in LEF

in LEF

multiple pins

geometries in LEF

PROPERTYDEFINITIONS statement
description, DEF

description, LEF

R
description, DEF

orthogonal paths

,

RGrid, description

ring pins

routing time, diagonal vias

routing width, LEF syntax

description, DEF

S
example

rules

SI units in LEF

description, LEF

symmetry

description

pins and wiring, DEF

description, DEF

syntax conventions

T
description, DEF

three-layer design, pitch ratio

description, DEF

,

U
UNITS DISTANCE MICRONS statement
description, DEF

description, LEF

V
values in library database

description, DEF

vertical bars in syntax

description, LEF

description, LEF

VIARULE viaRuleName GENERATE statement
description, LEF

default vias in LEF

layers for vias in LEF

description, DEF

W
wide wire signal wire, specifying

orthogonal paths

,

description

pins and wiring

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