A
Example Circuits
This appendix contains example netlists for testing the BSIM3v3 standard model.
- Notes on the BSIM3v3 Model
- Spectre Syntax
- SPICE BSIM 3v3 Model
- Spectre BSIM 3v3 Model
- Ring Oscillator Spectre Deck for Inverter Ring with No Fanouts (inverter_ring.sp)
- Ring Oscillator Spectre Deck for Two-Input NAND Ring with No Fanouts (nand2_ring.sp)
- Ring Oscillator Spectre Deck for Three-Input NAND Ring with No Fanouts (nand3_ring.sp)
- Ring Oscillator Spectre Deck for Two-Input NOR Ring with No Fanouts (nor2_ring.sp)
- Ring Oscillator Spectre Deck for Three-Input NOR Ring with No Fanouts (nor3_ring.sp)
- Opamp Circuit (opamp.cir)
- Opamp Circuit 2 (opamp1.cir)
- Original Open-Loop Opamp (openloop.sp)
- Modified Open-Loop Opamp (openloop1.sp)
- Example Model Directory (q35d4h5.modsp)
Notes on the BSIM3v3 Model
The Spectre® circuit simulator supports the standard BSIM 3v3 MOS model (both BSIM 3v3.1 and BSIM 3v3.2) as published by the University of California at Berkeley. Further information about this model can be obtained by using Spectre’s online help by typing spectre -h bsim3v3 at the command line or by consulting the BSIM3 home page at
www-device.eecs.berkeley.edu/~bsim3/index.html
Spectre does not add proprietary parameters to its implementation of the standard model.
Spectre Syntax
Notes explaining Spectre syntax are included as comments throughout the example netlists.
The Spectre circuit simulator reads Spice2G6 input along with its own native format. The model card can therefore be specified in either format. Below is an example of each. Note that the valid parameter list does not change, only the primitive name, level designation, and version/type parameters.
Beginning with the 4.4.3 release, the Spectre simulator is compatible with SPICE input language beyond documented SPICE2G6. Contact your local Cadence representative for more details.
SPICE BSIM 3v3 Model
*model = bsim3v3
*Berkeley Spice Compatibility
*Lmin= .35 Lmax= 20 Wmin= .6 Wmax= 20
.model N1 NMOS
+Level=11
+Tnom=27.0
+Nch=2.498E+17 Tox=9E-09 Xj=1.00000E-07
+Lint=9.36e-8 Wint=1.47e-7
+Vth0=.6322 K1=.756 K2=-3.83e-2 K3=-2.612
+Dvt0=2.812 Dvt1=0.462 Dvt2=-9.17e-2
+Nlx=3.52291E-08 W0= 1.163e-6 K3b= 2.233
+Vsat=86301.58 Ua=6.47e-9 Ub=4.23e-18 Uc=-4.706281E-11
+Rdsw=650 U0=388.3203 wr=1
+A0=.3496967 Ags=.1
+B0=0.546 B1= 1
+Dwg=-6.0E-09 Dwb=-3.56E-09 Prwb=-.213
+Keta=-3.605872E-02 A1=2.778747E-02 A2=.9
+Voff=-6.735529E-02 NFactor=1.139926 Cit=1.622527E-04
+Cdsc=-2.147181E-05 Cdscb= 0
+Dvt0w=0 Dvt1w=0 Dvt2w=0
+Cdscd=0 Prwg=0
+Eta0=1.0281729E-02 Etab=-5.042203E-03
+Dsub=.31871233
+Pclm=1.114846 Pdiblc1=2.45357E-03 Pdiblc2=6.406289E-03
+Drout=.31871233 Pscbe1=5000000 Pscbe2=5E-09 Pdiblcb=-.234
+Pvag=0 delta=0.01
+Wl=0 Ww=-1.420242E-09 Wwl = 0
+Wln=0 Wwn=.2613948 Ll=1.300902E-10
+Lw=0 Lwl=0 Lln=.316394 Lwn=0
+kt1=-.3 kt2=-.051
+At=22400
+Ute=-1.48
+Ua1=3.31E-10 Ub1=2.61E-19 Uc1=-3.42e-10
+Kt1l=0 Prt=764.3
Spectre BSIM 3v3 Model
*Berkeley Spice Compatibility
*Lmin= .35 Lmax= 20 Wmin= .6 Wmax= 20
simulator lang=spectre
model nch bsim3v3
+version=3.1
+type=n
+tnom=27.0
+nch=2.498E+17 tox=9E-09 xj=1.00000E-07
+lint=9.36e-8 wint=1.47e-7
+vth0=.6322 k1=.756 k2=-3.83e-2 k3=-2.612
+dvt0=2.812 dvt1=0.462 dvt2=-9.17e-2
+nlx=3.52291E-08 w0= 1.163e-6 k3b= 2.233
+vsat=86301.58 ua=6.47e-9 ub=4.23e-18 uc=-4.706281e-11
+rdsw=650 u0=388.3203 wr=1
+a0=.3496967 ags=.1
+b0=0.546 b1= 1
+dwg=-6.0e-09 dwb=-3.56e-09 prwb=-.213
+keta=-3.605872e-02 a1=2.778747e-02 a2=.9
+voff=-6.735529e-02 nfactor=1.139926 cit=1.622527e-04
+cdsc=-2.147181e-05 cdscb= 0
+dvt0w=0 dvt1w=0 dvt2w=0
+cdscd=0 prwg=0
+eta0=1.0281729e-02 etab=-5.042203e-03
+dsub=.31871233
+pclm=1.114846 pdiblc1=2.45357e-03 pdiblc2=6.406289e-03
+drout=.31871233 pscbe1=5000000 pscbe2=5e-09 pdiblcb=-.234
+pvag=0 delta=0.01
+wl=0 ww=-1.420242e-09 wwl = 0
+wln=0 wwn=.2613948 ll=1.300902e-10
+lw=0 lwl=0 lln=.316394 lwn=0
+kt1=-.3 kt2=-.051
+at=22400
+ute=-1.48
+ua1=3.31e-10 ub1=2.61e-19 uc1=-3.42e-10
+kt1l=0 prt=764.3
Ring Oscillator Spectre Deck for Inverter Ring with No Fanouts (inverter_ring.sp)
This example uses Spectre syntax.
// Ring oscillator Spectre deck for INVERTER ring with no fanouts.
simulator lang=spectre
global 0 gnd vdd vss
aliasGnd ( gnd 0 ) vsource type=dc dc=0
// Spectre options to be used
SetOption1 options iabstol=1.00n audit=full temp=25
MyAcct1 info what=inst extremes=yes
MyAcct2 info what=models extremes=yes
MyAcct3 info what=input extremes=yes
MyAcct5 info what=terminals extremes=yes
MyAcct6 info what=oppoint extremes=yes
// Next section is the subckt for inv
subckt inv ( nq a )
m1 ( nq a vdd vdd ) p l=0.35u w=2.60u ad=1.90p pd=6.66u as=1.90p ps=6.66u
m2 ( vss a nq vss ) n l=0.35u w=1.10u ad=0.80p pd=3.66u as=0.80p ps=3.66u
// Interconnect Caps for inv
c0 ( a vdd ) capacitor c=1.0824323e-15
c1 ( a nq ) capacitor c=3.0044e-16
c2 ( nq vss ) capacitor c=5.00186e-16
c3 ( nq vdd ) capacitor c=6.913993e-16
c4 ( a vss ) capacitor c=8.5372566e-16
ends
// Begin top level circuit definition
xinv1 ( 1 90 ) inv
xinv2 ( 2 1 ) inv
xinv3 ( 3 2 ) inv
xinv4 ( 4 3 ) inv
xinv5 ( 5 4 ) inv
xinv6 ( 6 5 ) inv
xinv7 ( 7 6 ) inv
xinv8 ( 8 7 ) inv
xinv9 ( 9 8 ) inv
xinv10 ( 10 9 ) inv
xinv11 ( 11 10 ) inv
xinv12 ( 12 11 ) inv
xinv13 ( 13 12 ) inv
xinv14 ( 14 13 ) inv
xinv15 ( 15 14 ) inv
xinv16 ( 16 15 ) inv
xinv17 ( 90 16 ) inv
// Next couple of lines sets variables for vdd and vss.
parameters vdd_S1=3.3
parameters vss_S1=0.0
vdd_I1 ( vdd gnd ) vsource dc=vdd_S1
vss_I1 ( vss gnd ) vsource dc=vss_S1
// Set initial conditions:
ic 2=0 4=0 6=0 8=0 10=0
// Next line makes the call to the model
// NOTE: The user may utilize the '.lib' syntax with Spectre's +spp
// command line option if they are using Spectre 4.43 or greater.
// There is also a Spectre native syntax for equivalent
// functionality. It is shown in q35d4h5.modsp.
include "q35d4h5.modsp" section=tt
// Analysis Statement
tempOption options temp=25
typ_tran tran step=0.010n stop=35n
alter_ss altergroup {
include "q35d4h5.modsp" section=ss
parameters vdd_S1=3.0
}
alterTempTo100 alter param=temp value=100
ss_tran tran step=0.010n stop=35n
alter_ff altergroup {
include "q35d4h5.modsp" section=ff
parameters vdd_S1=3.3
}
alterTempTo0 alter param=temp value=0
ff_tran tran step=0.010n stop=35n
Ring Oscillator Spectre Deck for Two-Input NAND Ring with No Fanouts (nand2_ring.sp)
This example uses Spectre syntax.
// Ring oscillator Spectre deck for 2-Input NAND ring with no fanouts.
simulator lang=spectre
global 0 gnd vdd vss
aliasGnd ( gnd 0 ) vsource type=dc dc=0
// Spectre options to be used
SetOption1 options iabstol=1.00n audit=full
MyAcct1 info what=inst extremes=yes
MyAcct2 info what=models extremes=yes
MyAcct3 info what=input extremes=yes
MyAcct5 info what=terminals extremes=yes
MyAcct6 info what=oppoint extremes=yes
// Next section is the subckt for na2 ******
subckt na2 ( nq a )
m1 ( nq a vdd vdd ) p l=0.35u w=2.70u ad=1.03p pd=3.46u as=1.98p ps=6.86u
m2 ( nq vdd vdd vdd ) p l=0.35u w=2.70u ad=1.03p pd=3.46u as=1.98p ps=6.86u
m3 ( vss a 6 vss ) n l=0.35u w=1.70u ad=1.25p pd=4.86u as=0.18p ps=1.91u
m4 ( nq vdd 6 vss ) n l=0.35u w=1.70u ad=1.25p pd=4.86u as=0.18p ps=1.91u
c0 ( a vdd ) capacitor c=1.0512057e-15
c1 ( a nq ) capacitor c=7.308e-17
c2 ( vdd vss ) capacitor c=6.12359e-16
c3 ( nq vss ) capacitor c=5.175377e-16
c4 ( nq vdd ) capacitor c=1.1668172e-15
c5 ( a vss ) capacitor c=9.530671e-16
ends
// Begin top-level circuit definition
xna21 ( 1 90 ) na2
xna22 ( 2 1 ) na2
xna23 ( 3 2 ) na2
xna24 ( 4 3 ) na2
xna25 ( 5 4 ) na2
xna26 ( 6 5 ) na2
xna27 ( 7 6 ) na2
xna28 ( 8 7 ) na2
xna29 ( 9 8 ) na2
xna210 ( 10 9 ) na2
xna211 ( 11 10 ) na2
xna212 ( 12 11 ) na2
xna213 ( 13 12 ) na2
xna214 ( 14 13 ) na2
xna215 ( 15 14 ) na2
xna216 ( 16 15 ) na2
xna217 ( 90 16 ) na2
// Next couple of lines sets variables for vdd and vss.
parameters vdd_S1=3.3
parameters vss_S1=0.0
vdd_I1 ( vdd gnd ) vsource dc=vdd_S1
vss_I1 ( vss gnd ) vsource dc=vss_S1
// Next line initializes nodes within ring
ic 2=0 4=0 6=0 8=0 10=0
include "q35d4h5.modsp" section=tt
// Next line defines transient steps and total simulation time
tempOption options temp=25
tt_tran tran step=0.010n stop=35n
alter_ss altergroup {
include "q35d4h5.modsp" section=ss
parameters vdd_S1=3.0
}
alterTempTo100 alter param=temp value=100
ss_tran tran step=0.010n stop=35n
alter_ff altergroup {
include "q35d4h5.modsp" section=ss
parameters vdd_S1=3.3
}
alterTempTo0 alter param=temp value=0
ff_tran tran step=0.010n stop=35n
Ring Oscillator Spectre Deck for Three-Input NAND Ring with No Fanouts (nand3_ring.sp)
This example uses Spectre syntax.
// Ring oscillator Spectre deck for 3-Input NAND ring with no fanouts.
simulator lang=spectre
global 0 gnd vdd vss
aliasGnd ( gnd 0 ) vsource type=dc dc=0
// Simulator options to use
SetOption1 options iabstol=1.00n audit=full
MyAcct1 info what=inst extremes=yes
MyAcct2 info what=models extremes=yes
MyAcct3 info what=input extremes=yes
MyAcct5 info what=terminals extremes=yes
MyAcct6 info what=oppoint extremes=yes
// Next section is the subckt for na3p1
subckt na3p1 ( nq a )
m1 ( nq a vdd vdd ) p l=0.35u w=2.90u ad=1.10p pd=3.66u as=2.12p ps=7.26u
m2 ( nq vdd vdd vdd ) p l=0.35u w=2.90u ad=1.10p pd=3.66u as=1.10p ps=3.66u
m3 ( nq vdd vdd vdd ) p l=0.35u w=2.90u ad=2.12p pd=7.26u as=1.10p ps=3.66u
m4 ( vss a 7 vss ) n l=0.35u w=2.40u ad=1.75p pd=6.26u as=0.25p ps=2.61u
m5 ( 7 vdd 8 vss ) n l=0.35u w=2.40u ad=0.25p pd=2.61u as=0.25p ps=2.61u
m6 ( nq vdd 8 vss ) n l=0.35u w=2.40u ad=1.75p pd=6.26u as=0.25p ps=2.61u
c0 ( 8 vdd ) capacitor c=1.341e-17
c1 ( vdd vss ) capacitor c=9.9445302e-16
c2 ( nq vss ) capacitor c=6.287e-16
c3 ( nq vdd ) capacitor c=2.0719818e-15
c4 ( a vss ) capacitor c=5.3760487e-16
c5 ( a vdd ) capacitor c=1.2446956e-15
c6 ( a nq ) capacitor c=7.308e-17
c7 ( 7 vdd ) capacitor c=2.0115e-17
ends
// Begin top level circuit definition
xna3p11 ( 1 90 ) na3p1
xna3p12 ( 2 1 ) na3p1
xna3p13 ( 3 2 ) na3p1
xna3p14 ( 4 3 ) na3p1
xna3p15 ( 5 4 ) na3p1
xna3p16 ( 6 5 ) na3p1
xna3p17 ( 7 6 ) na3p1
xna3p18 ( 8 7 ) na3p1
xna3p19 ( 9 8 ) na3p1
xna3p110 ( 10 9 ) na3p1
xna3p111 ( 11 10 ) na3p1
xna3p112 ( 12 11 ) na3p1
xna3p113 ( 13 12 ) na3p1
xna3p114 ( 14 13 ) na3p1
xna3p115 ( 15 14 ) na3p1
xna3p116 ( 16 15 ) na3p1
xna3p117 ( 90 16 ) na3p1
// Next couple of lines sets variables for vdd and vss.
parameters vdd_S1=3.3
parameters vss_S1=0.0
vdd_I1 ( vdd gnd ) vsource dc=vdd_S1
vss_I1 ( vss gnd ) vsource dc=vss_S1
// Next line initializes nodes within ring
ic 2=0 4=0 6=0 8=0 10=0
include "q35d4h5.modsp" section=tt
// Transient analysis card
tempOption options temp=25
typ_tran tran step=0.010n stop=35n
alter_ss altergroup {
include "q35d4h5.modsp" section=ss
parameters vdd_S1=3.0
}
alterTempTo100 alter param=temp value=100
ss_tran tran step=0.010n stop=35n
myAlter2 altergroup {
include "q35d4h5.modsp" section=ff
parameters vdd_S1=3.3
}
alterTempTo0 alter param=temp value=0
ff_tran tran step=0.010n stop=35n
Ring Oscillator Spectre Deck for Two-Input NOR Ring with No Fanouts (nor2_ring.sp)
This example uses Spectre syntax.
// Ring oscillator Spectre deck for 2-Input NOR ring with no fanouts.
simulator lang=spectre
global 0 gnd vdd vss
aliasGnd ( gnd 0 ) vsource type=dc dc=0
// Spectre options
SetOption1 options iabstol=1.00n audit=full
MyAcct1 info what=inst extremes=yes
MyAcct2 info what=models extremes=yes
MyAcct3 info what=input extremes=yes
MyAcct5 info what=terminals extremes=yes
MyAcct6 info what=oppoint extremes=yes
// Next section is the subckt for no2
subckt no2 ( nq a )
m1 ( vdd a 6 vdd ) p l=0.35u w=4.80u ad=3.50p pd=11.06u as=0.50p ps=5.01u
m2 ( nq vss 6 vdd ) p l=0.35u w=4.80u ad=3.50p pd=11.06u as=0.50p ps=5.01u
m3 ( vss a nq vss ) n l=0.35u w=1.20u ad=0.88p pd=3.86u as=0.46p ps=1.96u
m4 ( vss vss nq vss ) n l=0.35u w=1.20u ad=0.88p pd=3.86u as=0.46p ps=1.96u
c0 ( a vdd ) capacitor c=6.3676066e-16
c1 ( a nq ) capacitor c=5.3592e-17
c2 ( vdd vss ) capacitor c=5.39538e-16
c3 ( nq vss ) capacitor c=8.780327e-16
c4 ( nq vdd ) capacitor c=5.577428e-16
c5 ( a vss ) capacitor c=1.1100392e-15
ends
// begin top level circuit definition
xno21 ( 1 90 ) no2
xno22 ( 2 1 ) no2
xno23 ( 3 2 ) no2
xno24 ( 4 3 ) no2
xno25 ( 5 4 ) no2
xno26 ( 6 5 ) no2
xno27 ( 7 6 ) no2
xno28 ( 8 7 ) no2
xno29 ( 9 8 ) no2
xno210 ( 10 9 ) no2
xno211 ( 11 10 ) no2
xno212 ( 12 11 ) no2
xno213 ( 13 12 ) no2
xno214 ( 14 13 ) no2
xno215 ( 15 14 ) no2
xno216 ( 16 15 ) no2
xno217 ( 90 16 ) no2
// Next couple of lines sets variables for vdd and vss.
parameters vdd_S1=3.3
parameters vss_S1=0.0
vdd_I1 ( vdd gnd ) vsource dc=vdd_S1
vss_I1 ( vss gnd ) vsource dc=vss_S1
// Next line initializes nodes within ring.
ic 2=0 4=0 6=0 8=0 10=0
include "q35d4h5.modsp" section=tt
// Analysis
tempOption options temp=25
tt_tran tran step=0.010n stop=35n
ss_alter altergroup {
include "q35d4h5.modsp" section=ss
parameters vdd_S1=3.0
}
alterTempTo100 alter param=temp value=100
ss_tran tran step=0.010n stop=35n
ff_alter altergroup {
include "q35d4h5.modsp" section=ff
parameters vdd_S1=3.3
}
alterTempTo0 alter param=temp value=0
ff_tran tran step=0.010n stop=35n
Ring Oscillator Spectre Deck for Three-Input NOR Ring with No Fanouts (nor3_ring.sp)
This example uses Spectre syntax.
// Ring oscillator spectre deck for 3-Input NOR ring with no fanouts.
simulator lang=spectre
global 0 gnd vdd vss
aliasGnd ( gnd 0 ) vsource type=dc dc=0
// Spectre options
SetOption1 options iabstol=1.00n audit=full rforce=1 temp=25
MyAcct1 info what=inst extremes=yes
MyAcct2 info what=models extremes=yes
MyAcct3 info what=input extremes=yes
MyAcct5 info what=terminals extremes=yes
MyAcct6 info what=oppoint extremes=yes
// Next section is the subckt for no3
subckt no3 ( nq a )
m1 ( vdd a 7 vdd ) p l=0.35u w=3.60u ad=2.63p pd=8.66u as=0.38p ps=3.81u
m2 ( 7 vss 8 vdd ) p l=0.35u w=3.60u ad=0.38p pd=3.81u as=0.38p ps=3.81u
m3 ( nq vss 8 vdd ) p l=0.35u w=3.60u ad=1.37p pd=4.36u as=0.38p ps=3.81u
m4 ( nq vss 9 vdd ) p l=0.35u w=3.60u ad=1.37p pd=4.36u as=0.38p ps=3.81u
m5 ( 9 vss 10 vdd ) p l=0.35u w=3.60u ad=0.38p pd=3.81u as=0.38p ps=3.81u
m6 ( vdd a 10 vdd ) p l=0.35u w=3.60u ad=2.63p pd=8.66u as=0.38p ps=3.81u
m7 ( vss a nq vss ) n l=0.35u w=1.40u ad=1.02p pd=4.26u as=0.53p ps=2.16u
m8 ( vss vss nq vss ) n l=0.35u w=1.40u ad=0.53p pd=2.16u as=0.53p ps=2.16u
m9 ( vss vss nq vss ) n l=0.35u w=1.40u ad=0.53p pd=2.16u as=1.02p ps=4.26u
c1 ( 9 nq ) capacitor c=3.7995e-17
c2 ( vdd vss ) capacitor c=1.3996057e-15
c3 ( nq vss ) capacitor c=3.1546797e-15
c4 ( nq vdd ) capacitor c=5.5551875e-16
c5 ( a vss ) capacitor c=1.2907233e-15
c6 ( a vdd ) capacitor c=2.1779808e-15
c7 ( 10 nq ) capacitor c=2.0115e-17
c8 ( a nq ) capacitor c=5.233362e-16
ends
// Begin top-level circuit definition
xno31 ( 1 90 ) no3
xno32 ( 2 1 ) no3
xno33 ( 3 2 ) no3
xno34 ( 4 3 ) no3
xno35 ( 5 4 ) no3
xno36 ( 6 5 ) no3
xno37 ( 7 6 ) no3
xno38 ( 8 7 ) no3
xno39 ( 9 8 ) no3
xno310 ( 10 9 ) no3
xno311 ( 11 10 ) no3
xno312 ( 12 11 ) no3
xno313 ( 13 12 ) no3
xno314 ( 14 13 ) no3
xno315 ( 15 14 ) no3
xno316 ( 16 15 ) no3
xno317 ( 90 16 ) no3
// Next couple of lines sets variables for vdd and vss.
parameters vdd_S1=3.3
parameters vss_S1=0.0
vdd_I1 ( vdd gnd ) vsource dc=vdd_S1
vss_I1 ( vss gnd ) vsource dc=vss_S1
// Next line initializes nodes within ring
ic 2=0 4=0 6=0 8=0 10=0
include "q35d4h5.modsp" section=tt
// Analysis
tempOption options temp=25
typ_tran tran step=0.010n stop=35n
alter_ss altergroup {
include "q35d4h5.modsp" section=ss
parameters vdd_S1=3.0
}
alterTempTo100 alter param=temp value=100
ss_tran tran step=0.010n stop=35n
alter_ff altergroup {
include "q35d4h5.modsp" section=ff
parameters vdd_S1=3.3
}
alterTempTo0 alter param=temp value=0
ff_tran tran step=0.010n stop=35n
Opamp Circuit (opamp.cir)
This example uses Spectre’s SPICE syntax.
.subckt opamp 1 2 6 8 9
m1 4 2 3 3 nch w=43u l=10u ad=0.3n as=0.3n pd=50u ps=50u
m2 5 1 3 3 nch w=43u l=10u ad=0.3n as=0.3n pd=50u ps=50u
m3 4 4 8 8 pch w=10u l=10u ad=0.3n as=0.3n pd=20u ps=20u
m4 5 4 8 8 pch w=10u l=10u ad=0.3n as=0.3n pd=20u ps=20u
m5 3 7 9 9 nch w=38u l=10u ad=0.3n as=0.3n pd=40u ps=40u
m6 6 5 8 8 pch w=344u l=10u ad=1.3n as=1.3n pd=350u ps=350u
m7 6 7 9 9 nch w=652u l=10u ad=2.3n as=2.3n pd=660u ps=660u
m8 7 7 9 9 nch w=38u l=10u ad=0.3n as=0.3n pd=40u ps=40u
cc 5 6 4.4p
ibias 8 7 8.8u
.ends opamp
Opamp Circuit 2 (opamp1.cir)
This example uses Spectre’s SPICE syntax.
.subckt opamp 1 2 6 8 9
m1 4 2 3 3 nch w=20u l=0.5u ad=0.3n as=0.3n pd=50u ps=50u
m2 5 1 3 3 nch w=20u l=0.5u ad=0.3n as=0.3n pd=50u ps=50u
m3 4 4 8 8 pch w=20u l=0.5u ad=0.3n as=0.3n pd=20u ps=20u
m4 5 4 8 8 pch w=20u l=0.5u ad=0.3n as=0.3n pd=20u ps=20u
m5 3 7 9 9 nch w=20u l=0.5u ad=0.3n as=0.3n pd=40u ps=40u
m6 6 5 8 8 pch w=20u l=0.5u ad=1.3n as=1.3n pd=350u ps=350u
m7 6 7 9 9 nch w=20u l=0.5u ad=2.3n as=2.3n pd=660u ps=660u
m8 7 7 9 9 nch w=20u l=0.5u ad=0.3n as=0.3n pd=40u ps=40u
cc 5 6 4.4p
ibias 8 7 8.8u
.ends opamp
Original Open-Loop Opamp (openloop.sp)
* Allen & Holmberg, p. 438 - Original Open Loop OpAmp Configuration
vinp 1 0 dc 0 ac 1.0
vdd 4 0 dc 5.0
vss 0 5 dc 5.0
vinm 2 0 dc 0
cl 3 0 20p
x1 1 2 3 4 5 opamp
** Bring in opamp subcircuit
include "opamp.cir"
** Bring in models here
.model nch bsim3v3
.model pch bsim3v3 type=p
.op
simulator lang = spectre
tf (3 0) xf save=lvlpub nestlvl=1 start=1 stop=1K dec=20
simulator lang = spice
.dc vinp -0.005 0.005 100u
.print dc v(3)
.ac dec 10 1 10MEG
.print ac vdb(3) vp(3
.end
Modified Open-Loop Opamp (openloop1.sp)
* Allen & Holmberg, p. 438 - Modified Open Loop OpAmp Configuration
vinp 1 0 dc 0 ac 1.0
vdd 4 0 dc 5.0
vss 0 5 dc 5.0
vinm 2 0 dc 0
cl 3 0 20p
x1 1 2 3 4 5 opamp
** Bring in opamp subcircuit
include "opamp1.cir"
** Bring in models here
.model nch bsim3v3
.model pch bsim3v3 type=p
.op
simulator lang = spectre
tf (3 0) xf save=lvlpub nestlvl=1 start=1 stop=1K dec=20
simulator lang = spice
.dc vinp -0.10 0.10 10u
.print dc v(3)
.ac dec 10 1 10MEG
.print ac vdb(3) vp(3)
.end
Example Model Directory (q35d4h5.modsp)
//example model directory
simulator lang = spectre
library mosmodels
section tt
model n bsim3v3 tox=1.194e-08
model p bsim3v3 type=p tox=7.4e-09
endsection
section ss
model n bsim3v3 tox=1.242e-08
model p bsim3v3 type=p tox=7.724e-09
endsection
section ff
model n bsim3v3 tox=1.1544e-08
model p bsim3v3 type=p tox=7.148e-09
endsection
endlibrary
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