C
Sample Model Library
This appendix discusses the Sample Model Library, which is included with this product. The library contains the following types of components:
- Analog Components
- Basic Components
- Control Components
- Logic Components
- Electromagnetic Components
- Functional Blocks
- Magnetic Components
- Mathematical Components
- Measure Components
- Mechanical Systems
- Mixed-Signal Components
- Power Electronics Components
- Semiconductor Components
- Telecommunications Components
You can use these models as they are, you can copy them and modify them to create new parts, or you can use them as examples. The models are in the following directory in the software hierarchy:
$CDSHOME/tools/dfII/samples/artist/spectreHDL/Verilog-A
Refer to the README file in this directory for a list of the files containing the models. The filenames have the suffix .va. For example, the model for the switch is located in sw.va. Each model has an associated test circuit that can be used to simulate the model. The test circuits can be found in the test directory.
These models are also integrated into a Cadence® design framework II library, complete with symbols and Component Description Formats (CDFs). If you are using the Cadence analog design environment, you can access these models by adding the following library to your library path:
your_install_dir/tools/dfII/samples/artist/ahdlLib
This appendix provides a list of the parts and functions in the sample library. They are grouped according to application.
In the terminal description and parameter descriptions, the letters between the square brackets, such as [V,A] and [V], refer to the units associated with the terminal or parameter. V means volts, A means amps. (val, flow) means that any units can be used.
Analog Components
Analog Multiplexer
Terminals
Description
When vsel > vth, the output voltage follows vin1.
When vsel < vth, the output voltage follows vin2.
Instance Parameters
vth = 1->0 threshold voltage for the selection line [V]
Current Deadband Amplifier
Terminals
iin_p, iin_n: differential input current terminals [V,A]
iout: output current terminal [V,A]
Description
Outputs ileak when differential input current (iin_p - iin_n) is between idead_low and idead_high. When outside the deadband, the output current is an amplified version of the differential input current plus ileak.
Instance Parameters
idead_low = lower range of dead band [A]
idead_high = upper range of dead band [A]
ileak = offset current; only output in deadband [A]
gain_low = differential current gain in lower region []
gain_high = differential current gain in lower region []
Hard Current Clamp
Terminals
Description
Hard limits output current to between iclamp_upper and iclamp_lower of the input current.
Instance Parameters
iclamp_upper = upper clamping current [A]
iclamp_lower = lower clamping current [A]
Hard Voltage Clamp
Terminals
Description
vout- vgnd hard clamped/limited to between vclamp_upper and vclamp_lower of vin - vgnd.
Instance Parameters
vclamp_upper = upper clamping voltage [A]
vclamp_lower = lower clamping voltage [A]
Open Circuit Fault
Terminals
vp, vn: output terminals [V,A]
Description
At time=twait, the connection between the two terminals is opened. Before this, the connection between the terminals is closed.
Instance Parameters
twait = time to wait before open fault happens [s]
Operational Amplifier
Terminals
vin_p, vin_n: differential input voltage [V,A]
vspply_p: positive supply voltage [V,A]
vspply_n: negative supply voltage [V,A]
Instance Parameters
freq_unitygain = unity gain frequency [Hz]
vin_offset = input offset voltage referred to negative [V]
rsrc = source resistance [Ohms]
rout = output resistance [Ohms]
vsoft = soft output limiting value [V]
Constant Power Sink
Terminals
Description
Normally power watts of power is sunk. If the absolute value of vp - vn is above vabsmin, a faction of the power is sunk. The fraction is the ratio of vp - vn to vabsmin.
Instance Parameters
vabsmin = absolute value of minimum input voltage [V]
Short Circuit Fault
Terminals
vp, vn: output terminals [V,A]
Description
At time=twait, the two terminals short. Before this, the connection between the terminals is open.
Instance Parameters
twait = time to wait before short circuit occurs [s]
Soft Current Clamp
Terminals
Description
Limits output current to between iclamp_upper and iclamp_lower of the input current.
The limiting starts working once the input current gets near iclamp_lower or iclamp_upper. The clamping acts exponentially to ensure smoothness.
The fraction of the range (iclamp_lower, iclamp_upper) over which the exponential clamping action occurs is exp_frac.
Excess current coming from vin is routed to vgnd.
Instance Parameters
iclamp_upper = upper clamping current [A]
iclamp_lower = lower clamping current [A]
exp_frac = fraction of iclamp range from iclamp_upper and iclamp_lower at which exponential clamping starts to have an effect []
Soft Voltage Clamp
Terminals
Description
vout- vgnd clamped/limited to between vclamp_upper and vclamp_lower of vin - vgnd.
The limiting starts working once the input voltage gets near vclamp_lower or vclamp_upper. The clamping acts exponentially to ensure smoothness.
The fraction of the range (vclamp_lower, vclamp_upper) over which the exponential clamping action occurs is exp_frac.
Instance Parameters
vclamp_upper = upper clamping voltage [A]
vclamp_lower = lower clamping voltage [A]
exp_frac = fraction of vclamp range from vclamp_upper and vclamp_lower at which exponential clamping starts to have an effect []
Self-Tuning Resistor
Terminals
vtune: the voltage that is being tuned [V,A]
verr: the error in vtune [V,A]
Description
This element operates in four distinct phases:
-
It waits for
tsettleseconds with the resistance betweenvpandvnset torinit. -
For
tdir_checkseconds, it attempts to tune the error away by increasing the resistance in proportion to the size of the error. -
It waits for
tsettleseconds with the resistance betweenvpandvnset torinit. -
For
tdir_checkseconds, it attempts to tune the error away by decreasing the resistance in proportion to the error. - Based on the results of (2) and (4), it selects which direction is better to tune in and tunes as best it can using integral action. For certain systems, this might lead to unstable behavior.
tsettle to be greater than the largest system time constant. Select rgain so that the positive feedback is not excessive during the direction sensing phases. Select tdir_check so that the system has enough time to react but not so big that the resistance drifts too far from rinit. It is better if it can be arranged that verr does not change sign during tuning.Instance Parameters
rmax = maximum resistance that tuning res can have [Ohms]
rmin = minimum resistance that tuning res can have [Ohms]
rinit = initial resistance [Ohms]
rgain = gain of integral tuning action [Ohms/(Vs)]
vtune_set = value that vtune must be tuned to [V]
tsettle = amount of time to wait before tuning begins [s]
tdir_check = amount of time to spend checking each tuning direction [s]
Untrimmed Capacitor
Terminals
Description
Each instance has a randomly generated value of capacitance, which is calculated at initialization. The distribution of these random values is gaussian (that is, normal) with a c_mean and a standard deviation of c_std.
Two seeds are needed to generate the gaussian distribution.
Instance Parameters
c_mean = mean capacitance [Ohms]
c_dev = standard deviation of capacitance [Ohms]
seed1 = first seed value for randomly generating capacitance values []
seed2 = second seed value for randomly generating capacitance values []
show_val = option to print the value of capacitance to stdout
Untrimmed Inductor
Terminals
Description
Each instance has a randomly generated value of inductance, which is calculated at initialization. The distribution of these random values is gaussian (that is, normal) with an l_mean and a standard deviation of l_std.
Two seeds are needed to generate the gaussian distribution.
Instance Parameters
l_mean = mean inductance [Ohms]
l_dev = standard deviation of inductance [Ohms]
seed1 = first seed value for randomly generating inductance values []
seed2 = second seed value for randomly generating inductance values []
show_val = option to print the value of inductance to stdout
Untrimmed Resistor
Terminals
Description
Each instance has a randomly generated value of resistance, which is calculated at initialization. The distribution of these random values is gaussian (that is, normal) with an r_mean and a standard deviation of r_std.
Two seeds are needed to generate the gaussian distribution.
Instance Parameters
r_mean = mean resistance [Ohms]
r_dev = standard deviation of resistance [Ohms]
seed1 = first seed value for randomly generating resistance values []
seed2 = second seed value for randomly generating resistance values []
show_val = option to print the value of resistance to stdout
Voltage Deadband Amplifier
Terminals
vin_p, vin_n: differential input voltage terminals [V,A]
vout: output voltage terminal [V,A]
Description
Outputs vleak when differential input voltage (vin_p-vin_n) is between vdead_low and vdead_high. When outside the deadband, the output voltage is an amplified version of the differential input voltage plus vleak.
Instance Parameters
vdead_low = lower range of dead band [V]
vdead_high = upper range of dead band [V]
vleak = offset voltage; only output in deadband [V]
gain_low = differential voltage gain in lower region []
gain_high = differential voltage gain in upper region []
Voltage-Controlled Variable-Gain Amplifier
Terminals
vin_p, vin_n: differential input terminals [V,A]
vctrl_p, vctrl_n: differential-controlling voltage terminals [V,A]
Description
When there is no input offset voltage, the output is vout = gain_const * (vctrl_p - vctrl_n) * (vin_p - vin_n) + (vout_high + vout_low)/2.
When there is an input offset voltage, vin_offset is subtracted from (vin_p - vin_n).
Instance Parameters
gain_const = amplifier gain when (vctrl_p - vctrl_n) = 1 volt []
vout_high = upper output limit [V]
vout_low = lower output limit [V]
Basic Components
Resistor
Terminals
Instance Parameters
Capacitor
Terminals
Instance Parameters
Inductor
Terminals
Instance Parameters
Voltage-Controlled Voltage Source
Terminals
vout_p, vout_n: controlled voltage terminals [V,A]
vin_p, vin_n: controlling voltage terminals [V,A]
Instance Parameters
Current-Controlled Voltage Source
Terminals
vout_p, vout_n: controlled voltage terminals [V,A]
iin_p, iin_n: controlling current terminals [V,A]
Instance Parameters
rm = resistance multiplier (V to I gain) [Ohms]
Voltage-Controlled Current Source
Terminals
iout_p, iout_n: controlled current source terminals [V,A]
vin_p, vin_n: controlling voltage terminals [V,A]
Instance Parameters
gm = conductance multiplier (V to I gain) [Mhos]
Current-Controlled Current Source
Terminals
iout_p, iout_n: controlled current terminals [V,A]
iin_p, iin_n: controlling current terminals [V,A]
Instance Parameters
Switch
Terminals
vp, vn: output terminals [V,A]
vctrlp, vctrln: control terminals [V,A]
Description
If (vctrlp - vctrln > vth), the branch between vp and vn is shorted. Otherwise, the branch between vp and vn is opened.
Instance Parameters
Control Components
Error Calculation Block
Terminals
sigset: setpoint signal (val, flow)
sigact: actual value signal (val, flow)
sigerr: error: difference between signals (val, flow)
Description
abstol and huge for the quantities associated with sigin and sigout can help overcome convergence and clipping problems.Instance Parameters
Lag Compensator
Terminals
Description
abstol and huge for the quantities associated with sigin and sigout can help overcome convergence and clipping problems.Instance Parameters
tau = compensator zero at -(1/tau) [s]
alpha = compensator pole at -(1/(alpha*tau)); alpha > 1 []
Lead Compensator
Terminals
Description
abstol and huge for the quantities associated with sigin and sigout can help overcome convergence and clipping problems.Instance Parameters
tau = compensator zero at -(1/tau) [s]
alpha = compensator pole at -(1/(alpha*tau)); alpha < 1 []
Lead-Lag Compensator
Terminals
Description
Defining larger values of abstol and huge for the quantities associated with sigin and sigout can help overcome convergence and clipping problems.
Instance Parameters
tau1 = compensator zero at -(1/tau1) [s]
alpha1 = compensator pole at -(1/(alpha*tau1)); alpha1 > 1 []
tau2 = compensator zero at -(1/tau2) [s]
alpha2 = compensator pole at -(1/(alpha*tau2)); alpha2 < 1 []
Proportional Controller
Terminals
Description
abstol and huge for the quantities associated with sigin and sigout can help overcome convergence and clipping problems.Instance Parameters
Proportional Derivative Controller
Terminals
Description
sigout = kp*sigin + kd* dot (sigin)
abstol and huge for the quantities associated with sigin and sigout can help overcome convergence and clipping problems.Instance Parameters
Proportional Integral Controller
Terminals
Description
This model is a proportional, integral, and derivative controller.
sigout = kp * sigin + ki * integ (sigin) + kd* dot (sigin)
abstol and huge for the quantities associated with sigin and sigout can help overcome convergence and clipping problems.Instance Parameters
Proportional Integral Derivative Controller
Terminals
Description
sigout = kp * sigin + ki * integ (sigin) + kd* dot (sigin)
abstol and huge for the quantities associated with sigin and sigout can help overcome convergence and clipping problems.Instance Parameters
Logic Components
AND Gate
Terminals
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
NAND Gate
Terminals
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for high [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
OR Gate
Terminals
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for high [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
NOT Gate
Terminals
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for high [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
NOR Gate
Terminals
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for high [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
XOR Gate
Terminals
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for high [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
XNOR Gate
Terminals
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for high [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
D-Type Flip-Flop
Terminals
Description
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
vtrans = voltages above this at input are considered high [V]
vtrans_clk = transition voltage of clock [V]
tdel, trise, tfall = {usual} [s]
Clocked JK Flip-Flop
Terminals
Description
| J | K | Q | Q' |
|---|---|---|---|
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
JK-Type Flip-Flop
Terminals
Description
Logic Table
| J | K | Q | Q(t+e) |
|---|---|---|---|
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
Level Shifter
Terminals
Description
sigout = sigin added to sigshift.
Instance Parameters
RS-Type Flip-Flop
Terminals
Logic Table
| S(t) | R(t) | Q(t) | Q(t+e) |
|---|---|---|---|
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
Trigger-Type (Toggle-Type) Flip-Flop
Terminals
vout_q, vout_qbar: outputs [V,A]
Description
Logic Table
| T | Q | Q(t+e) |
|---|---|---|
Instance Parameters
initial_state = the initial state/output of the flip-flop []
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
Half Adder
Terminals
vin1, vin2: bits to be added [V,A]
Instance Parameters
vlogic_high = logic high value [V]
vlogic_low = logic low value [V]
vtrans = threshold for inputs to be high [V]
tdel, trise, tfall = {usual} [s]
Full Adder
Terminals
vin1, vin2: bits to be added [V,A]
Instance Parameters
vlogic_high = logic high value [V]
vlogic_low = logic low value [V]
vtrans = threshold for inputs to be high [V]
tdel, trise, tfall = {usual} [s]
Half Subtractor
Terminals
vout_diff: difference out [V,A]
Formula
vin1 - vin2 = vout_diff and borrow
Truth Table
| in1 | in2 | diff | borrow |
|---|---|---|---|
Instance Parameters
vlogic_high = logic high value [V]
vlogic_low = logic low value [V]
vtrans = threshold for inputs to be high [V]
tdel, trise, tfall = {usual} [s]
Full Subtractor
Terminals
vout_diff: difference out [V,A]
Truth Table
| in1 | in2 | bin | bout | doff |
|---|---|---|---|---|
Instance Parameters
vlogic_high = logic high value [V]
vlogic_low = logic low value [V]
vtrans = threshold for inputs to be high [V]
tdel, trise, tfall = {usual} [s]
Parallel Register, 8-Bit
Terminals
vin_d0..vin_d7: input data lines [V,A]
vout_d0..vout_d7: output data lines [V,A]
Description
Input occurs on the rising edge of venable.
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
Serial Register, 8-Bit
Terminals
vout_d: output data lines [V,A]
Description
Input occurs on the rising edge of vclk.
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
Electromagnetic Components
DC Motor
Terminals
pos_shaft: motor shaft [rad, Nm]
Description
This is a model of a DC motor driving a shaft.
Instance Parameters
Electromagnetic Relay
Terminals
vopen: normally opened terminal [V,A]
vclosed: normally closed terminal [V,A]
vctrl_n: negative control signal [V,A]
vctrl_p: positive control signal [V,A]
Description
This is a model of a voltage-controlled single-pole, double-throw switch. When the voltage differential between vctrl_p and vctrl_n exceeds vtrig, the normally open branch is shorted (closed). Otherwise, the normally open branch stays open. If the open branch is already closed and the voltage differential between vctrl_p and vctrl_n falls below vrelease, the normally open branch is opened.
Instance Parameters
vtrig = input value to close relay [V]
vrelease = input value to open relay [V]
Three-Phase Motor
Terminals
vp1, vn1: phase 1 terminals [V,A]
vp2, vn2: phase 2 terminals [V,A]
vp3, vn3: phase 3 terminals [V,A]
pos: position of shaft [rad, Nm]
shaft: speed of shaft [rad/s, Nm]
com: rotational reference point [rad/s, Nm]
Instance Parameters
j = inertia factor [Nms^2/rad]
Functional Blocks
Amplifier
Terminals
Instance Parameters
gain = gain between input and output []
sigin_offset = subtracted from sigin before amplification (val)
Comparator
Terminals
sigref: reference to which sigin is compared (val, flow)
sigout: comparator output (val, flow)
Description
Compares (sigin-sigin_offset) to sigref—the output is related to their difference by a tanh relationship.
If the difference >>> sigref, sigout is sigout_high.
If the difference = sigref, sigout is (sigout_high + sigout_low)/2.
If the difference <<< sigref, sigout is sigout_low.
Intermediate points are fitting to a tanh scaled by comp_slope.
Instance Parameters
sigout_high = maximum output of the comparator (val)
sigout_low = minimum output of the comparator (val)
sigin_offset = subtracted from sigin before comparison to sigref (val)
comp_slope = determines the sensitivity of the comparator []
Controlled Integrator
Terminals
Description
Integration occurs while sigctrl is above sigctrl_trans.
Instance Parameters
sigout0 = initial sigout value (val)
sigctrl_trans = if sigcntl is above this, integration occurs (val)
Deadband
Terminals
Description
Deadband region is when sigin is between sigin_dead_high and sigin_dead_low. sigout is zero in the deadband region. Above the deadband, the output is sigin - sigin_dead_high. Below the deadband, the output is sigin - sigin_dead_low.
Instance Parameters
sigin_dead_high = upper deadband limit (val)
sigin_dead_low = lower deadband limit (val)
Deadband Differential Amplifier
Terminals
sigin_p, sigin_n: differential input terminals (val, flow)
sigout: output terminal (val, flow)
Description
Outputs sigout_leak when differential input (sigin_p-sigin_n) is between sigin_dead_low and sigin_dead_high. When outside the deadband, the output is an amplified version of the differential input plus sigout_leak.
Instance Parameters
sigin_dead_low = lower range of dead band (val)
sigin_dead_high = upper range of dead band (val)
sigout_leak = offset signal; only output in deadband (val)
gain_low = differential gain in lower region []
gain_high = differential gain in upper region []
Differential Amplifier (Opamp)
Terminals
Description
sig_out is gain times the adjusted input differential signal. The adjusted input differential signal is the differential input minus sigin_offset.
Instance Parameters
gain = amplifier differential gain (val)
sigin_offset = input offset (val)
Differential Signal Driver
Terminals
sigin_p, sigin_n: differential input signals (val, flow)
sigout_p, sigout_n: differential output signals (val, flow)
sigref: differential outputs are with reference to this node
(val, flow)
Description
Amplifies its differential pair of input by an amount gain, producing a differential pair of output signals. The output differential signals appear symmetrically about sigref.
Instance Parameters
Differentiator
Terminals
Instance Parameters
Flow-to-Value Converter
Terminals
Description
val(sigout_p, sigout_n) = flow(sigin_p, sigin_n)
Instance Parameters
Rectangular Hysteresis
Terminals
Instance Parameters
hyst_state_init = the initial output []
sigout_high = maximum input/output (val)
sigout_low = minimum input/output (val)
sigtrig_low = the sigin value that will cause sigout to go low when sigout is high (val)
sigtrig_high = the sigin value that will cause sigout to go high when sigout is low (val)
tdel, trise, tfall = {usual} [s]
Integrator
Terminals
Instance Parameters
sigout0 = initial sigout value (val)
Level Shifter
Terminals
Description
sigout = sigin added to sigshift.
Instance Parameters
Limiting Differential Amplifier
Terminals
Description
Has limited output swing. sigout is gain times the adjusted differential input signal about (sigout_high + sigout_low)/2. The adjusted differential input signal is the differential input signal minus sigin_offset.
Instance Parameters
sigout_high = upper amplifier output limit (val)
sigout_low = lower amplifier output limit (val)
gain = amplifier gain within the limits []
sigin_offset = input offset (val)
Logarithmic Amplifier
Terminals
Description
sigout is gain times the natural log of the absolute value of the adjusted input. The adjusted input is sigin minus sigin_offset unless the absolute value of the this is less than min_sigin. In this case, min_sigin is used as the adjusted input.
Instance Parameters
min_sigin = absolute value of minimum acceptable sigin (val)
sigin_offset = input offset (val)
Multiplexer
Terminals
sigin1, sigin2, sigin3: signals to be multiplexed (val, flow)
cntrlp, cntrlm: differential-controlling signal (val, flow)
Description
If the differential-controlling signal is below sigth_high, sigout is sigin1. If the differential-controlling signal is above sigth_low, sigout is sigin3. In between these two thresholds, sigout = sigin2.
Instance Parameters
sigth_high = high threshold value (val)
sigth_low = low threshold value (val)
Quantizer
Terminals
Description
This model quantizes input with unity gain.
Instance Parameters
nlevel = number of levels to quantize to []
round = if yes, go to nearest q-level, otherwise go to nearest q-level below []
sigout_high = maximum input/output (val)
sigout_low = minimum input/output (val)
tdel, trise, tfall = {usual} [s]
Repeater
Terminals
Description
From 0 to period, sigout = sigin. After this, sigout is a periodic repetition of what sigin was between 0 and period.
Instance Parameters
period = period of repeated waveform (val)
Saturating Integrator
Terminals
Description
The output is the limited integral of the input. The limits are sigout_max, sigin_min. sigout0 must lie between sigout_max and sigin_min.
Instance Parameters
sigout0 = initial sigout value (val)
sigout_max = maximum signal out (val)
sigout_min = minimum signal out (val)
Swept Sinusoidal Source
Terminals
sigout_p, sigout_n: output (val, flow)
Description
The instantaneous frequency of the output is sweep_rate * time plus start_freq.
Instance Parameters
start_freq = start frequency [Hz]
sweep_rate = rate of increase in frequency [Hz/s]
amp = amplitude of output sinusoid (val)
points_per_cycle = number of points in a cycle of the output []
Three-Phase Source
Terminals
vout_star: star terminal [V,A]
Instance Parameters
amp = phase-to-phase voltage amplitude [V]
Value-to-Flow Converter
Terminals
Description
flow(sigout_p, sigout_n) = val(sigin_p, sigin_n)
Instance Parameters
Variable Frequency Sinusoidal Source
Terminals
sigin: frequency-controlling signal (val, flow)
Description
Outputs a variable frequency sinusoidal signal. Its instantaneous frequency is (center_freq + freq_gain * sigin) [Hz]
Instance Parameters
amp = amplitude of the output signal (val)
center_freq = center frequency of oscillation frequency when sigin = 0 [Hz]
freq_gain = oscillator conversion gain (Hz/val)
Variable-Gain Differential Amplifier
Terminals
sigin_p, sigin_n: differential input terminals (val, flow)
sigctrl_p, sigctrl_n: differential-controlling terminals (val, flow)
Description
sigout is the product of gain_const, (sigctrl_p - sigctrl_n), and the adjusted input differential signal added to (sigout_high + sigout_low)/2. The adjusted input differential signal is the input differential signal minus sigin_offset.
Instance Parameters
gain_const = amplifier gain when (sigctrl_p - sigctrl_n) = 1 unit []
sigout_high = upper output limit (val)
sigout_low = lower output limit (val)
sigin_offset = input offset (val)
Magnetic Components
Magnetic Core
Terminals
mp: positive MMF terminal [A, Wb]
mn: negative MMF terminal [A, Wb]
Description
This is a Jiles/Atherton magnetic core model.
Instance Parameters
len = effective magnetic length of core [m]
area = magnetic cross-section area of core [m2]
alpha = interdomain coupling coefficient
c = coefficient for reversible magnetization
Magnetic Gap
Terminals
mp: positive MMF terminal [A, Wb]
mn: negative MMF terminal [A, Wb]
Description
This is a Jiles/Atherton magnetic gap model.
This model is analogous to a linear resistor in an electrical system.
Instance Parameters
len = effective magnetic length of gap [m]
area = magnetic cross-section area of gap [m2]
Magnetic Winding
Terminals
vp: positive voltage terminal [V,A]
vn: negative voltage terminal [V,A]
mp: positive MMF terminal [A, Wb]
mn: negative MMF terminal [A, Wb]
Description
This is a Jiles/Atherton winding model.
Instance Parameters
num_turns = number of turns []
rturn = winding resistance per turn [Ohms]
Two-Phase Transformer
Terminals
Description
This is structural transformer model implemented using Jiles/Atherton core and winding primitives
Instance Parameters
turns1 = number of turns in the first winding []
turns1 = number of turns in the second winding []
rwinding1 = resistance per turn of first winding [Ohms]
rwinding2 = resistance per turn of second winding [Ohms]
len = length of the transformer core [m]
area = area of the transformer core [m2]
alpha = interdomain coupling coefficient
c = coefficient for reversible magnetization
Mathematical Components
Absolute Value
Terminals
Description
sigout is the absolute value of sigin.
Instance Parameters
Adder
Terminals
Description
This model adds two node values.
Instance Parameters
Adder, 4 Numbers
Terminals
sigin1, sigin2, sigin3, sigin4: (val, flow)
Description
sigout = gain1*sigin1 + gain2*sigin2 +gain3*sigin3 + gain4*sigin4
Instance Parameters
Cube
Terminals
Description
sigout is the cube of the sigin.
Instance Parameters
Cubic Root
Terminals
Description
sigout is the cubic root of sigin.
Instance Parameters
epsilon = small number added to sigin to ensure not getting pow(0,0.3333.), because pow() is implemented using logs (val)
Divider
Terminals
signumer: numerator (val, flow)
sigdenom: denominator (val, flow)
Description
sigout is gain multiplied by signumer divided by sigdenom unless the absolute value of sigdenom is less than min_sigdenom. In that case, signumer is divided by min_sigdenom instead and multiplied by the sign of the sigdenom.
Instance Parameters
min_sigdenom = minimum denominator (val)
Exponential Function
Terminals
Description
sigout is an exponential function of sigin. However, if sigin is greater than max_sigin, sigin is taken to be max_sigin. This is necessary because the exponential function explodes very quickly.
Instance Parameters
max_sigin = maximum value of sigin accepted (val)
Multiplier
Terminals
sigin1, sigin2: inputs (val, flow)
Description
sigout = gain * sigin1 * signin2
Instance Parameters
Natural Log Function
Terminals
Description
sigout is the natural log of sigin, providing sigin > min_sigin. If sigin is between 0 and min_sigin, sigout is the log of min_sigin. If sigin is less than 0, an error is reported.
Instance Parameters
min_sigin = minimum value of sigin (val)
Polynomial
Terminals
Description
This is a model of a third-order polynomial function.
sigout = p3 * sigin3 + p2 * sigin2 + p1 * sigin + p0
Instance Parameters
Power Function
Terminals
Description
sigout is sigin to the power of exponent.
Instance Parameters
exponent = what sigin is raised by []
epsilon = small number added to sigin to ensure not getting pow(0,0.3333.), because pow() is implemented using logs (val)
Reciprocal
Terminals
Description
Instance Parameters
min_sigdenom = minimum denominator (val)
Signed Number
Terminals
Description
This is a model of the sign of the input.
sigout is +1 if sigin >= 0; otherwise, sigout is -1.
Instance Parameters
Square
Terminals
Description
sigout is the square of the sigin.
Instance Parameters
Square Root
Terminals
Description
sigout is the square root of sigin.
Instance Parameters
Subtractor
Terminals
sigin_p: input subtracted from (val, flow)
sigin_n: input that is subtracted (val, flow)
Instance Parameters
Subtractor, 4 Numbers
Terminals
sigin1, sigin2, sigin3, sigin4: (val, flow)
Description
sigout = gain1*sigin1 - gain2*sigin2 - gain3*sigin3 - gain4*sigin4
Instance Parameters
Measure Components
ADC, 8-Bit Differential Nonlinearity Measurement
Terminals
vd0..vd7: data lines from ADC [V,A]
vout: voltage sent from conversion to ADC [V,A]
vclk: clocking signal for the ADC [V,A]
Description
Measures an 8-bit analog-to-digital converter’s (ADC’s) differential nonlinearity measurement (DNL) using a histogram method. vout is sequentially set to 4,096 equally spaced voltages between vstart and vend. At each different value of vout, a clock pulse is generated causing the ADC to convert this vout value. The resultant code of each conversion is stored.
When all the conversions have been done, the DNL is calculated from the recorded data.
If log_to_file is yes, the DNL (differential nonlinearity) is recorded and written to filename.
Instance Parameters
tsettle = time to allow for settling after the data lines are changed before vd0-7 are recorded [s]—also the period of the ADC conversion clock.
vstart = voltage at which to start conversion sweep []
vend = voltage at which to end conversion sweep []
log_to_file = whether to log the results to a file; yes or no []
filename = the name of the file in which the results are logged []
ADC, 8-Bit Integral Nonlinearity Measurement
Terminals
vd0..vd7: data lines from ADC [V,A]
vout: voltage sent from conversion to ADC [V,A]
vclk: clocking signal for the ADC [V,A]
Description
Measures an 8-bit ADC’s INL using a histogram method. vout is sequentially set to 4,096 equally spaced voltages between vstart and vend. At each different value of vout, a clock pulse is generated causing the ADC to convert this vout value. The resultant code of each conversion is stored.
When all the conversions have been done, the INL is calculated from the recorded data.
If log_to_file is yes, the INL (integral nonlinearity) is recorded and written to filename.
Instance Parameters
tsettle = time to allow for settling after the data lines are changed before vd0-7 are recorded [s]—also the period of the ADC conversion clock.
vstart = voltage at which to start conversion sweep []
vend = voltage at which to end conversion sweep []
log_to_file = whether to log the results to a file; yes or no []
filename = the name of the file in which the results are logged []
Ammeter (Current Meter)
Terminals
vout: measured current converted to a voltage [V,A]
Description
Measures the current between two of its nodes. It has two modes: rms (root-mean-squared) and absolute.
The measurement is passed through a first-order filter with bandwidth bw before being written to a file and appearing at vout. This is useful when doing rms measurements. If bw is set to zero, no filtering is done.
Instance Parameters
mtype = type of current measurement; absolute or rms []
bw = bw of output filter (a first-order filter) [Hz]
log_to_file = whether to log the results to a file; yes or no []
filename = the name of the file in which the results are logged []
DAC, 8-Bit Differential Nonlinearity Measurement
Terminals
vin: terminal for monitoring DAC output voltages [V,A]
vd0..vd7: data lines for DAC [V,A]
Description
Sweeps through all the 256 codes and records the digital-to-analog converter (DAC) output voltage and writes the maximum DNL found to the output.
If log_to_file is yes, the DNL (differential nonlinearity) is recorded and written to filename.
Instance Parameters
tsettle = time to allow for settling after the data lines are changed before vin is recorded [s]
log_to_file = whether to log the results to a file; yes or no []
filename = the name of the file in which the results are logged []
DAC, 8-Bit Integral Nonlinearity Measurement
Terminals
vin: terminal for monitoring DAC output voltages [V,A]
vd0..vd7: data lines for DAC [V,A]
Description
Sweeps through all the 256 codes and records the DAC output voltage and writes the maximum INL found to the output.
If log_to_file is yes, the INL (integral nonlinearity) is recorded and written to filename.
Instance Parameters
tsettle = time to allow for settling after the data lines are changed before vin is recorded [s]
log_to_file = whether to log the results to a file; yes or no []
filename = the name of the file in which the results are logged []
Delta Probe
Terminals
start_pos, start_neg: signal that controls start of measurement []
stop_pos, stop_neg: signal that controls end of measurement []
Description
This probe measures argument delta between the occurrence of the starting and stopping events. It can also be used to find when the start and stop signals cross the specified reference values (by default start_count and stop_count are set to 1).
Instance Parameters
start_td, stop_td = signal delays [s]
start_val, stop_val = signal value that starts/end measurement []
start_count, stop_count = number of signal values that starts/end measurement
start_mode = one of the starting/stopping modes []
arg–argument value (simulation time)
rise–crossing of the signal value on rise
fall–crossing of the signal value on fall
crossing–any crossing of the signal value
stop_mode = one of the starting/stopping modes []
arg–argument value (simulation time)
rise–crossing of the signal value on rise
fall–crossing of the signal value on fall
crossing–any crossing of the signal value
Find Event Probe
Terminals
out_pos, out_neg: signal to measure []
start_pos, start_neg: signal that controls start of measurement []
ref_pos, ref_neg: differential reference signal
Description
This model is of a signal statistics probe. This probe measures the output signal at the occurrence of the event:
-
If
arg_valis given, measure at this value. -
If
start_ref_valis given, measure the output signal when the start signal crosses this value. -
If
start_ref_valis not given, measure the output signal when it is equal to the reference signal.
Instance Parameters
start = argument value that starts measurements
stop = argument value that stops measurements
start_val = signal value that starts/ends measurement []
start_count = number of signal values that starts/ends measurement
start_mode = one of the starting/stopping modes []
arg–argument value (simulation time)
rise–crossing of the signal value on rise
fall–crossing of the signal value on fall
crossing–any crossing of the signal value
start_ref_val = start signal reference value []
arg_val = argument value that controls when to measure signals []
-
If
arg_valis given, measure at the specified value of the simulation argument. If it is not given, measure at the occurrence of the event. -
If
start_ref_valis given, measure the output signal when the start signal is equal to the reference value. -
If
start_ref_valis not given, measure the output signal when the start signal is equal to the reference signal.
Find Slope
Terminals
out_pos, out_neg: signal to measure []
Description
This model is of a signal statistics probe.
This probe measures slope of a signal between arg_val1 and arg_val2; if arg_val2 is not specified, it is set to the value exceeding arg_val1 by 0.1%.
Instance Parameters
arg_val1 = first argument value []
arg_val2 = (optional) second argument value []
Frequency Meter
Terminals
fout: measured frequency [F,A]
Description
Measures the frequency of the voltage across the terminals by detecting the times at which the last two zero crossings occurred. This method only works on pure AC waveforms.
Instance Parameters
log_to_file = whether to log the results to a file; yes or no []
filename = the name of the file in which the results are logged []
Offset Measurement
Terminals
vamp_out: output voltage of opamp being measured [V,A]
vamp_p: positive terminal of opamp being measured [V,A]
vamp_n: negative terminal of opamp being measured [V,A]
vamp_spply_p: positive supply of opamp being measured [V,A]
vamp_spply_n: negative supply of opamp being measured [V,A]
Description
This is a model of a slew rate measurer.
The opamp terminals of the opamp under test are connected to this model. It shorts vamp_out to vamp_n and grounds vamp_vp. After tsettle seconds, the voltage read at vamp_out is taken to be offset.
The result is printed to the screen.
Instance Parameters
vspply_p = positive supply voltage required by opamp [V]
vspply_n = negative supply voltage required by opamp [V]
tsettle = time to let opamp settle before measuring the offset [s]
Power Meter
Terminals
iin: input for current passing through the meter [V,A]
vp_iout: positive voltage sending terminal and output for current passing
through the meter [V,A]
vn: negative voltage sensing terminal [V,A]
pout: measured impedance converted to a voltage [V]
va_out: measured apparent power [W]
pf_out: measured power factor []
Description
To measure the power being dissipated in a 2-port device, this meter should be placed in the netlist so that the current flowing into the device passes between iin and vp_iout first, that vp_iout is connected to the positive terminal of the device, and that vn is connected to the negative terminal of the device.
The measured power is the average over time of the product of the voltage across and the current through the device. This average is calculated by integrating the VI product and dividing by time and passing the result through a first-order filter with bandwidth bw.
The apparent power is calculated by finding the rms values of the current and voltage first and filtering them with a first-order filter of bandwidth bw. The apparent power is the product of the voltage and current rms values.
The purpose of the filtering is to remove ripple. Cadence recommends that bw be set to a low value to produce accurate measurements and that at least 10 input AC cycles be allowed before the power meter is considered settled. Also allow time for the filters to settle.
This meter requires accurate integration, so it is desirable that the integration method is set to gear2only in the netlist.
Instance Parameters
tstart = time to wait before starting measurement [s]
bw = bw of rms filters (a first-order filter) [Hz]
log_to_file = whether to log the results to a file; yes or no []
filename = the name of the file in which the results are logged []
Q (Charge) Meter
Terminals
Description
Measures the charge that has flown between vn and vp between tstart and tend.
Instance Parameters
log_to_file = whether to log the results to a file; yes or no []
filename = the name of the file in which the results are logged []
Sampler
Terminal
Description
Samples sigin every tsample and writes the results to filename and labels the data with label. The time variable is recorded if log_time is yes.
Instance Parameters
tsample = how often input is sampled [s]
filename = name of file where samples are stored []
label = label for signal being sampled []
log_time = if the time variable should be logged to a file []
Slew Rate Measurement
Terminals
vamp_out: output voltage of the opamp being measured [V,A]
vamp_p: positive terminal of the opamp being measured [V,A]
vamp_n: negative terminal of the opamp being measured [V,A]
vamp_spply_p: positive supply of the opamp being measured [V,A]
vamp_spply_n: negative supply of the opamp being measured [V,A]
Description
Monitors the input and records the times at which it equals vstart and vend. The slew is given to be vstart - vend divided by the time difference.
The result is printed to the screen.
Instance Parameters
vspply_p = positive supply voltage required by opamp [V]
vspply_n = negative supply voltage required by opamp [V]
twait = time to wait before applying pulse to opamp input [V]
vstart = voltage at which to record the first measurement point [V]
vend = voltage at which to record the other measurement point [V]
tmin = minimum time allowed between both measurements before an error is reported [s]
Signal Statistics Probe
Terminals
out_pos, out_neg: signal to measure []
start_pos, start_neg: signal that controls start of measurement []
stop_pos, stop_neg: signal that controls end of measurement []
Description
This probe measures signals such as minimum, maximum, average, peak-to-peak, root mean square, standard deviation of the output, and start signals within a measuring window. It also gives a correlation coefficient between output and start signals.
Instance Parameters
start_arg = argument value that starts measurements
stop_arg = argument value that stops measurements
start_td, stop_td = signal delays [s]
start_val, stop_val = signal value that starts/end measurement []
start_count, stop_count = number of signal values that starts/end measurement
start_mode = one of starting/stopping modes []
arg–argument value (simulation time)
rise–crossing of the signal value on rise
fall–crossing of the signal value on fall
crossing–any crossing of the signal value
stop_mode = one of starting/stopping modes []
arg–argument value (simulation time)
rise–crossing of the signal value on rise
fall–crossing of the signal value on fall
crossing–any crossing of the signal value
Voltage Meter
Terminals
Description
Measures the voltage between two of its nodes. It has two modes: rms (root-mean-squared) and absolute.
The measurement is passed through a first-order filter with bandwidth bw before being written to a file and appearing at vout. This is useful when doing rms measurements. If bw is set to zero, no filtering is done.
Instance Parameters
mtype = type of voltage measurement; absolute or rms []
bw = bw of output filter (a first-order filter) [Hz]
log_to_file = whether to log the results to a file; yes or no []
filename = the name of the file in which the results are logged []
Z (Impedance) Meter
Terminals
iin: input for current passing through the meter [V,A]
vp_iout: positive voltage-sensing terminal and output for current passing through the meter [V,A]
vn: negative voltage sensing terminal [V,A]
zout: measured impedance converted to a voltage [Ohms]
Description
To measure the impedance across a 2-port device, this meter should be placed in the netlist so that the current flowing into the device passes between iin and vp_iout first, that vp_iout is connected to the positive terminal of the device, and that vn is connected to the negative terminal of the device.
The impedance is calculated by finding the rms values of the current and voltage first and filtering them with a first-order filter of bandwidth bw. The impedance is the ratio of these filtered Irms and Vrms values. The purpose of the filtering is to remove ripple.
Cadence recommends that bw be set to a low value to produce accurate measurements and that at least 10 input AC cycles be allowed before the zmeter is considered settled. Also allow time for the filters to settle.
The time step size should also be kept small to increase accuracy.
This meter is nonintrusive—that is, it does not drive current in the device being measured. However to work it requires that something else drives current through the device.
Instance Parameters
bw = bw of rms filters (a first-order filter) [Hz]
log_to_file = whether to log the results to a file; yes or no []
filename = the name of the file in which the results are logged []
Mechanical Systems
Gearbox
Terminals
wshaft1: shaft of the first gear [rad/s, Nm]
wshaft2: shaft of the second gear [rad/s, Nm]
Description
This is a model of two intermeshed gears.
Instance Parameters
radius1 = radius of first gear [m]
radius2 = radius of second gear [m]
inertia1 = inertia of first gear [Nms/rad]
inertia2 = inertia of second gear [Nms/rad]
Mechanical Damper
Terminals
Instance Parameters
d = friction coefficient [N/m]
Mechanical Mass
Terminal
Instance Parameters
gravity = whether gravity acting on the direction of movement of mass []
Mechanical Restrainer
Terminals
Description
Limits extension of the nodes to which it is attached.
Instance Parameters
Road
Terminal
Description
This is a model of a road with bumps.
Instance Parameters
distance = distance to first bump [m]
Mechanical Spring
Terminals
Instance Parameters
Wheel
Terminals
Description
This is a model of a bearing wheel on a fixed surface.
Instance Parameters
height = height of the wheel [m]
Mixed-Signal Components
Analog-to-Digital Converter, 8-Bit
Terminals
vd0..vd7: data output terminals [V,A]
Description
This ADC comprises 8 comparators. An input voltage is compared to half the reference voltage. If the input exceeds it, bit 7 is set and half the reference voltage is subtracted. If not, bit 7 is assigned zero and no voltage is subtracted from the input. Bit 6 is found by doing an equivalent operation comparing double the adjusted input voltage coming from the first comparator with half the reference voltage. Similarly, all the other bits are found.
Mismatch effects in the comparator reference voltages can be modeled setting mismatch to a nonzero value. The maximum mismatch on a comparator’s reference voltage is +/-mismatch percent of that voltage’s nominal value.
Instance Parameters
mismatch_fact = maximum mismatch as a percentage of the average value []
vtrans_clk = clk high-to-low transition voltage [V]
vref = voltage that voltage is done with respect to [V]
tdel, trise, tfall = {usual} [s]
Analog-to-Digital Converter, 8-Bit (Ideal)
Terminals
vd0..vd7: data output terminals [V,A]
Description
This model is ideal because no mismatch is modeled.
Instance Parameters
tdel, trise, tfall = {usual} [s]
vtrans_clk = clk high-to-low transition voltage [V]
vref = voltage that voltage is done with respect to [V]
Decimator
Terminals
Description
Produces a cumulative average of N samples of vin. vin is sampled on the positive vclk transition. The cumulative average of the previous set of N samples is output until a new set of N samples has been captured.
Transfer Function: 1/N * (1 - Z^-N)/(1-Z^-1)
Instance Parameters
vtrans_clk = transition voltage of the clock [V]
tdel, trise, tfall = {usual} [s]
Digital-to-Analog Converter, 8-Bit
Terminals
Description
Mismatch effects can be modeled in this DAC by setting mismatch to a nonzero value. The maximum mismatch on a bit is +/-mismatch percent of that bit’s nominal value.
Instance Parameters
vref = reference voltage for the conversion [V]
mismatch_fact = maximum mismatch as a percentage of the average value []
vtrans = logic high-to-low transition voltage [V]
tdel, trise, tfall = {usual} [s]
Digital-to-Analog Converter, 8-Bit (Ideal)
Terminals
Instance Parameters
vref = reference voltage that conversion is with respect to [V]
vtrans = transition voltage between logic high and low [V]
tdel, trise, tfall = {usual} [s]
Sigma-Delta Converter (first-order)
Terminals
Description
This is a model of a first-order sigma-delta analog-to-digital converter.
Instance Parameters
vth = threshold voltage of two-level quantizer [V]
vout_high = range of sigma-delta is 0-vout_high [V]
vtrans_clk = transition of voltage of clock [V]
Sample-and-Hold Amplifier (Ideal)
Terminals
Instance Parameters
vtrans_clk = transition voltage of the clock [V]
Single Shot
Terminals
Description
This model outputs a logic high pulse of duration pulse_width if a positive transition is detected on the input.
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
Switched Capacitor Integrator
Terminals
vout_p, vout_n: output terminals [V,A]
vin_p, vin_n: input terminals [V,A]
Instance Parameters
cap_in = input capacitor value
cap_fb = feedback capacitor value
vphi_trans = transition voltage of vphi
Power Electronics Components
Full Wave Rectifier, Two Phase
Terminals
tfire: delay after positive zero crossing of each phase before phase
rectifier fires [s,A]
vout: rectified output voltage [V,A]
Instance Parameters
ihold = holding current (minimum current for rectifier to work) [A]
switch_time = maximum amount of time to spend attempting switch-on [s]
vdrop_rect = total rectification voltage drop [V]
Half Wave Rectifier, Two Phase
Terminals
tfire: delay after positive zero crossing of each phase before phase
rectifier fires [s,A]
vout: rectified output voltage [V,A]
Instance Parameters
ihold = holding current (minimum current for rectifier to work) [A]
switch_time = maximum amount of time to spend attempting switch-on [s]
vdrop_rect = total rectification voltage drop [V]
Thyristor
Terminals
Instance Parameters
iturn_on = thyristor gate triggering current [A]
ihold = thyristor hold current [A]
von = thyristor on voltage [V]
Semiconductor Components
Diode
Terminals
vcathode: cathode voltage [V,A]
Description
This model is of a diode based on the Schockley equation.
Instance Parameters
is = saturation current with negative bias [A]
MOS Transistor (Level 1)
Terminals
Description
This model is of a basic, level-1, Schichmann-Hodges style model of a MOSFET transistor.
Instance Parameters
phi = bulk junction potential [V]
lambda = channel length modulation []
u0 = transconductance factor []
xj = metallurgical junction depth []
cj = bulk junction capacitance [F]
vj = bulk junction voltage [V]
mj = bulk grading coefficient []
fc = forward bias capacitance factor []
tau = parasitic diode factor []
cgbo = gate-bulk overlap capacitance [F]
cgso = gate-source overlap capacitance [F]
cgdo = gate-drain overlap capacitance [F]
dev_type = the type of MOSFET used []
MOS Thin-Film Transistor
Terminals
vgate_front: front gate terminal [V,A]
vsource: source terminal [V,A]
vgate_back: back gate terminal [V,A]
Description
This model is of a silicon-on-insulator thin-film transistor.
This is a model of a fully depleted back surface thin-film transistor MOSFET model. No short-channel effects.
Instance Parameters
lambda = channel length modulation factor []
N JFET Transistor
Terminals
Description
This is a model of an n-channel, junction field-effect transistor.
Instance Parameters
lambda = output conductance factor []
cjs = gate-source junction capacitance [F]
cgd = gate-drain junction capacitance [F]
phi = gate junction barrier potential []
fc = forward bias capacitance factor []
NPN Bipolar Junction Transistor
Terminals
Description
This is a gummel-poon style npn bjt model.
Instance Parameters
ise = base-emitter leakage current []
isc = base-collector leakage current []
nf = forward emission coefficient []
nr = reverse emission coefficient []
ne = b-e leakage emission coefficient []
nc = b-c leakage emission coefficient []
vaf = forward Early voltage [V]
var = reverse Early voltage [V]
ikf = forward knee current [A]
ikr = reverse knee current [A]
cje = capacitance, base-emitter junction [F]
vje = voltage, base-emitter junction [V]
mje = b-e grading exponential factor []
cjc = capacitance, base-collector junction [F]
vjc = voltage, base-collector junction [V]
mjc = b-c grading exponential factor []
cjs = capacitance, collector-substrate junction [F]
vjs = voltage, collector-substrate junction [V]
mjs = c-s grading exponential factor []
fc = forward bias capacitance factor []
tf = ideal forward transit time [s]
vtf = tf-vbc dependence voltage [V]
tr = reverse diffusion capacitance [s]
Schottky Diode
Terminals
vcathode: cathode voltage [V,A]
Description
This model is of a diode based on the Schockley equation.
Instance Parameters
cjo = zero-bias junction capacitance [F]
fc = forward bias capacitance [F]
bv = reverse breakdown voltage [V]
gmin = minimal conductance [Mhos]
Telecommunications Components
AM Demodulator
Terminals
vin: AM RF input signal [V,A]
vout: demodulated signal [V,A]
Description
Demodulates the signal in vin and outputs it as vout.
Consists of four stages in series:
- RF amp amplifier
- Detector stage (full wave rectifier)
-
AF filters stage is a low-pass filter that extracts the AF signal—has gain of one, and two poles at
af_wn[rad/s] -
AF amp stage amplifies by
af_gainand addsaf_lev_shift
Instance Parameters
rf_gain = gain of RF (radio frequency) stage []
af_wn = location of both AF (audio frequency) filter poles [rad/s]
af_gain = gain of the audio amplifier []
af_lev_shift = added to AF signal after amplification and filtering [V]
AM Modulator
Terminals
Description
vin is limited to the range between vin_max and vin_min. It is also scaled so that it lies within the +/-1 range. This produces vin_adjusted. vout is given by the following formula:
vout = unmod_amp * (1 + mod_depth * vin_adjusted) * cos (2 * PI * f_carrier * time)
Instance Parameters
f_carrier = carrier frequency [Hz]
vin_max = maximum input signal [V]
vin_min = minimum input signal [V]
mod_depth = modulation depth []
unmod_amp = unmodulation carrier amplitude [V]
Attenuator
Terminals
vout: rectified AM signal [V,A]
Description
vout is attenuated by attenuation.
Instance Parameters
attenuation = 20log10 attenuation [dB]
Audio Source
Terminals
Description
This model synthesizes an audio source. Its output is the sum of 4 sinusoidal sources.
Instance Parameters
amp1 = amplitude of the first sinusoid [V]
amp2 = amplitude of the second sinusoid [V]
amp3 = amplitude of the third sinusoid [V]
amp4 = amplitude of the fourth sinusoid [V]
freq1 = frequency of the first sinusoid [Hz]
freq2 = frequency of the second sinusoid [Hz]
freq3 = frequency of the third sinusoid [Hz]
freq4 = frequency of the fourth sinusoid [Hz]
Bit Error Rate Calculator
Terminals
Description
This model compares the two input signals tstart+tperiod/2 and every tperiod seconds later. At the end of the simulation, it prints the bit error rate, which is the number of errors found divided by the number of bits compared.
Instance Parameters
tstart = when to start measuring [s]
tperiod = how often to compare bits [s]
vtrans = voltages above this at input are considered high [V]
Charge Pump
Terminals
vout: output terminal from which charge pumped/sucked [V,A]
vsrc: source terminal from which charge sourced/sunk [V,A]
siginc, sigdec: Logic signal that controls charge pump operation [V,A]
Description
This model can source of sink a fixed current, iamp. Its mode depends on the values of siginc and sigdec;
When siginc > vtrans, iamp amps are pumped from the output. When sigdec > vtrans, iamp amps are sucked into the output. When both siginc and sigdec are in the same state, no current is sucked/pumped.
Instance Parameters
iamp = charging current magnitude [A]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
Code Generator, 2-Bit
Terminals
vout0, vout1: output bits [V,A]
Description
Generates a pair of random binary signals.
Instance Parameters
tperiod = period of output code [s]
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
tdel, trise, tfall = {usual} [s]
Code Generator, 4-Bit
Terminals
Description
This model is of a random 4-bit code generator.
This model outputs a different, randomly generated, 4-bit code every tperiod seconds.
Instance Parameters
tperiod = period of the code generation [s]
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
tdel, trise, tfall = {usual} [s]
Decider
Terminals
Description
This model samples this input signal a number of times and outputs the most likely value of the binary data contained in the signal.
A decision on what data is contained in the input is made each tperiod. During each decision period, a sample of the input is taken each tsample. A count of the number of samples with values greater than (vlogic_high + vlogic_low)/2 is kept. If at the end of the period, this count is greater than half the number of samples taken, a logic 1 is output. If it is less than half the number of samples, vlogic_low is output. Otherwise, the output is (vlogic_high + vlogic_low)/2.
The sampling starts at tstart.
Instance Parameters
tperiod = period of binary data being extracted [s]
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
tstart = time at which to start sampling [s]
tdel, trise, tfall = {usual} [s]
Digital Phase Locked Loop (PLL)
Terminals
Description
The model comprises a number of submodels: digital phase detector, a change pump, a low-pass filter (LPF), and a digital voltage-controlled oscillator (VCO).
They are arranged in the following way:
___________ ________ _______
| | | | Iq Vin_VCO | |
Vin------| Phase |------| Charge |--->--|----------| |
| | | | V | VCO |
----| Detector |------| Pump | ___|___ | |
| |___________| |________| | | |_______|
| | | RC | |
| | |Network| |
| | | (LPF) | |---Vout
| V_local_osc | |_______| |
| | | |
| |----------- |
| | |
| __|__ |
| gnd ///// |
| |
|-----------------------------------------------------|
Instance Parameters
pump_iamp = amplitude of the charge pump’s output current [A]
vco_cen_freq = center frequency of the VCO [Hz]
vco_gain = the gain of the VCO []
lpf_zero_freq = zero frequency of LPF (low-pass filter) [Hz]
lpf_pole_freq = pole frequency of LPF [Hz]
lpf_r_nom = nominal resistance of RC network implementing LPF
Digital Voltage-Controlled Oscillator
Terminals
Description
The output is a square wave with instantaneous frequency:
Instance Parameters
center_freq = center frequency of oscillation frequency when vin = 0 [Hz]
vco_gain = oscillator conversion gain [Hz/volt]
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
tdel, trise, tfall = {usual} [s]
FM Demodulator
Terminals
vin: FM RF input signal [V,A]
vout: demodulated signal [V,A]
Description
Demodulates the signal in vin and outputs it as vout.
Consists of four stages in series:
-
RF amp stage amplifiers
vin - Detector stage is a phase locked loop (PLL)
-
AF filters stage is a low-pass filter that extracts the AF signal. The filter has gain of one, and two poles at
af_wn[rad/s] -
AF amp stage amplifies by
af_gainand addsaf_lev_shift.
Instance Parameters
rf_gain = gain of RF (radio frequency) stage []
pll_out_bw = bandwidth of PLL output filter [Hz]
pll_vco_gain = gain of the PLL’s VCO []
pll_vco_cf = the center frequency of the PLLs [Hz]
af_wn = location of both AF (audio frequency) filter poles [Hz]
af_gain = gain of the audio amplifier []
af_lev_shift = added to AF signal after amplification and filtering [V]
FM Modulator
Terminals
Description
where phase = integ (2 * PI * f_carrier + vin_gain * vin)
Instance Parameters
f_carrier = carrier frequency [Hz]
amp = amplitude of the FM modulator output []
vin_gain = amplification of vin_signal before it is used to modulate the FM carrier signal []
Frequency-Phase Detector
Terminals
vin_if: signal whose phase is being detected [V,A]
vin_lo: signal from local oscillator [V,A]
sigout_inc: logic signal to control charge pump [V,A]
sigout_dec: logic signal to control charge pump [V,A]
Description
The freq_ph_detector can have three states: behind, ahead, and same. The specific state is determined by the positive-going transitions of the signals vin_if and vin_lo.
Positive transitions on vin_if causes the state to become the next higher state unless the state is already ahead.
Positive transitions on vin_lo cause the state to become the next lower state unless the state is already behind.
The output depends on the state the detector is in:
ahead => sigout_inc = high, sigout_dec = low
same => sigout_inc = high, sigout_dec = high
behind => sigout_inc = low, sigout_dec = high
The output signals are expected to be used by a charge_pump.
Instance Parameters
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
Mixer
Terminals
Description
Instance Parameters
Noise Source
Terminals
Description
This is an approximate white noise source.
Instance Parameters
amp = amplitude of the output signal about 0 [V]
PCM Demodulator, 8-Bit
Terminals
vout: demodulated signal [V,A]
Description
The PCM demodulator samples vin at bit_rate [Hz] starting at tstart + 0.5/bit_rate. Each set of 8 samples is considered a binary word, and these sets are converted to an output voltage using a linear 8-bit binary code with 0 representing vin_min and 255 representing vin_max. The first bit received is the LSB, bit 0; the last bit received is the MSB, bit 7.
The output rate is bit_rate/8.
Instance Parameters
freq_sample = sample frequency [Hz]
tstart = when to start sampling [s]
vout_min = minimum input voltage [V]
vout_max = maximum input voltage [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
PCM Modulator, 8-Bit
Terminals
Description
The PCM modulator samples vin at a sample_freq [Hz] starting at tstart. Once a sample has been obtained, it is converted to a linear 8-bit binary code with 0 representing vin_min and 255 representing vin_max.
The bits are in the code and are sequentially put through vout at a rate 8 times sample_freq with vlogic_high signifying a 1 and vlogic_low signifying a 0. The first bit transmitted is the LSB, bit 0; the last bit transmitted is the MSB, bit 7.
Clipping occurs when the input is outside vin_min and vin_max.
Instance Parameters
sample_freq = sample frequency [Hz]
tstart = when to start sampling [s]
vin_min = minimum input voltage [V]
vin_max = maximum input voltage [V]
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
tdel, trise, tfall = {usual} [s]
Phase Detector
Terminals
vlocal_osc: local oscillator voltage [V,A]
vin_rf: PLL radio frequency input voltage [V,A]
vif: intermediate frequency output voltage [V,A]
Instance Parameters
mtype = type of phase detection to be used; chopper or multiplier []
Phase Locked Loop
Terminals
vlocal_osc: local oscillator voltage [V,A]
vin_rf: PLL radio frequency input voltage [V,A]
vout: voltage proportional to the frequency being locked onto [V,A]
vout_ph_det: output of the phase detector [V,A]
Instance Parameters
vco_gain = gain of VCO cell [Hz/V]
vco_center_freq = VCO oscillation frequency [Hz]
phase_detect_type = type of phase detection cell to be used []
vout_filt_bandwidth = bandwidth of the low-pass filter on output [Hz]
PM Demodulator
Terminals
vin: PM RF input signal [V,A]
vout: demodulated signal [V,A]
Description
Demodulates the signal in vin and outputs it as vout.
Consists of four stages in series:
-
RF amp stage amplifiers
vin. - Detector stage is a phase locked loop (PLL)—the phase detector output is tapped.
-
AF filters stage is a low-pass filter that extracts the AF signal—has gain of one, and two poles at
af_wn[rad/s]. -
AF amp stage amplifies by
af_gainand addsaf_lev_shift.
Instance Parameters
rf_gain = gain of RF (radio frequency) stage []
pll_out_bw = bandwidth of PLL output filter [Hz]
pll_vco_gain = gain of the PLL’s VCO []
pll_vco_cf = the center frequency of the PLLs [Hz]
af_wn = location of both AF (audio frequency) filter poles [Hz]
af_gain = gain of the audio amplifier []
af_lev_shift = added to AF signal after amplification and filtering [V]
PM Modulator
Terminals
Description
vout = amp * sin(2 * PI * f_carrier * time + phase_max * vin_adjusted)
where vin_adjusted is scaled version of vin that lies within the +/-1 range.
Before scaling, vin is limited to the range between vin_max and vin_min by clipping.
Instance Parameters
f_carrier = carrier frequency [Hz]
amp = amplitude of the PM modulator output []
vin_max = maximum acceptable input (clipping occurs above this) [V]
vin_min = minimum acceptable input (clipping occurs above this) [V]
phase_max = the phase shift produced when the modulating signal is at vin_max [rad]
QAM 16-ary Demodulator
Terminals
vout_bit[0-4]: demodulated codes [V,A]
Description
This model is of a QPSK (quadrature phase shift key) modulator.
Demodulates a 16ary encoded QAM signal by separately sampling the input signal at 90 degrees (q-phase) and 180 degrees (i-phase).
This model does not contain a dynamic synchronizing mechanism for ensuring that sampling occurs at the correct time points. Synchronizing can be statically adjusted by changing tstart. tstart should correspond to when the input QAM signal is at 0 degrees.
The i-phase contains the two MSBs. The q-phase contains the two LSBs.
The constellation diagram representing this relationship follows.
^
/ \
| Q phase
_____________|______________
| | | | |
| 0011 | 0111 | 1011 | 1111 |
0 |______|______|______|______|
| | | | |
V | 0010 | 0110 | 1010 | 1110 |
o ___|______|______|______|______|___________\ I Phase
l | | | | | /
t | 0001 | 0101 | 1001 | 1101 |
s |______|______|______|______|
| | | | |
| 0000 | 0100 | 1000 | 1100 |
|______|______|______|______|
|
|
0 Volts
Each code box is vbox_width volts wide.
Instance Parameters
freq = demodulation frequency [Hz]
vbox_width = width of modulation code box in constellation diagram [V]
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
tdel, trise, tfall = {usual} [s]
Quadrature Amplitude 16-ary Modulator
Terminals
vin_b[0-3]: bits of input code [V,A]
Description
This model does 16 value (4-Bit) QAM.
It encodes the MSBs on the i-phase and the LSBs on the q-phase. Its constellation diagram can be represented as
/ \
| Q phase
_____________|______________
| | | | |
| 0011 | 0111 | 1011 | 1111 |
0 |______|______|______|______|
| | | | |
V | 0010 | 0110 | 1010 | 1110 |
o ___|______|______|______|______|___________\ I Phase
l | | | | | /
t | 0001 | 0101 | 1001 | 1101 |
s |______|______|______|______|
| | | | |
| 0000 | 0100 | 1000 | 1100 |
|______|______|______|______|
|
0 Volts
The two MSBs are encoded on the i-phase. The two LSBs are encoded on the q-phase.
The modulating formula is Vout = i_phase * cos(wt) + q_phase * sin(wt)
i_phase and q_phase vary between -phase_ampl and phase_ampl.
Instance Parameters
freq = modulation frequency [Hz]
phase_ampl = amplitude of the i-phase and q-phase signals [V]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
QPSK Demodulator
Terminals
Description
Does a QPSK demodulation on the input signal. It does not contain a dynamic synchronizing mechanism. Synchronizing can be adjusted by changing tstart.
Detection works by separately sampling the i-phase of vin and the q-phase of vin at freq Hz and 90 degrees out of phase. The first i-phase sample is done at tstart + 0.5/freq, the next 1/freq seconds later, etc. Similarly, the first q-phase sample is done at tstart + 0.25/freq, the next 1/freq seconds later, and so on.
For the i-phase, a high is detected if the sample < -vthresh. For the q-phase, a high is detected if the sample > vthresh.
Instance Parameters
freq = demodulation frequency [Hz]
vthresh = threshold detection voltage [V]
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
tstart = time at which demodulation starts [s]
tdel, trise, tfall = {usual} [s]
QPSK Modulator
Terminals
vin_i, vin_q: quadrature inputs [V,A]
Description
This takes two sampled quadrature inputs and does QPSK modulation on them.
Instance Parameters
freq = modulation frequency [Hz]
vtrans = voltages above this at input are considered high [V]
tdel, trise, tfall = {usual} [s]
Random Bit Stream Generator
Terminal
Description
This model generates a random stream of bits.
Instance Parameters
tperiod = period of stream [s]
vlogic_high = output voltage for high [V]
vlogic_low = output voltage for low [V]
tdel, trise, tfall = {usual} [s]
Transmission Channel
Terminals
vout: rectified AM signal [V,A]
Description
vin has noise_amp noise added to it and the resultant is attenuated by attenuation [dB].
Instance Parameters
attenuation = 20log10 attenuation [dB]
noise_amp = amplitude of noise added to vin before attenuation [V]
Voltage-Controlled Oscillator
Terminals
vin: oscillation-controlling voltage [V,A]
Instance Parameters
amp = amplitude of the output signal [V]
center_freq = center frequency of oscillation frequency when vin = 0 [Hz]
vco_gain = oscillator conversion gain [Hz/volt]
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