Product Documentation

Cadence VHDL-AMS Overview
Product Version 22.09, April 2022

Index

A

access types

across (scalar nature)

array

B

braces, meaning of in syntax

branches

reference directions for

C

component

declaration

instantiation statement

composite types

array

record

conservative systems

defined

conventions, typographical

F

file types

G

generic map

ground nodes

potential of

I

IEEE libraries

IEEE mathematical packages

MATH_COMPLEX

MATH_REAL

interface declaration

K

Kirchhoff’s Laws

Flow Law

Potential Law

L

Libraries

IEEE

M

MATH_COMPLEX package

MATH_REAL package

Mathematical packages

MATH_COMPLEX

MATH_REAL

P

port declaration

port map

port types

Q

quantity

R

reference (scalar nature)

reference directions

illustrated

S

scalar nature

square brackets, meaning of, in syntax

Synopsys IEEE libraries

syntax

definition operator (::=)

typographical conventions for

systems

conservative

T

terminal

through (scalar nature)

V

vertical bars, meaning of, in syntax

⠀ X