Virtuoso Integrity 3D-IC Flow
The Integrity™ 3D-IC platform enables 3D design planning, implementation, and system analysis.
Three-dimensional IC stacking often has analog ICs that are designed in Virtuoso but the bump planning and interaction with other ICs or interposers is done in Integrity 3D-IC. For the Virtuoso Integrity 3D-IC flow, an analog IC in Virtuoso is the starting point. The bump information is passed from Virtuoso through the Integrity hierarchical database (iHDB) to Integrity 3D-IC. Bumps are modified in Integrity 3D-IC and the modified bump information is passed back through iHDB to Virtuoso. To transfer the bump information across various platforms, a die layout is reduced to a smaller die abstract, which contains only the bump information and the die boundary.
It is important that the bumps, pads, or IOs are always in sync when designing a 3D-IC system. Both the analog IC designer working in the Virtuoso environment and a system designer working on the Integrity platform must be able to transfer data seamlessly to achieve the system bump planning.The flow ensures that the changes made by an IC designer are correctly reflected in Integrity 3D-IC and vice-versa.
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