To provide some benefits to the wreal construct, Cadence has made significant extensions, beyond the Verilog-AMS LRM restrictions. These extensions enable support for:
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Electrical to wreal and wreal to electrical connect modules
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Connecting wreal nets hierarchically to wires and coercing the wires to become wreals
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wreal arrays, similar to busses, that groups multiple real values into a single, indexible entity
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wrealXState and wrealZState
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Resolution function for wreal nets with multiple wreal drivers using the
-wreal_resolutioncommand-line option -
wreal as an independent variable in the
$table_modelfunction -
Connecting a wreal to a VHDL real signal or SystemVerilog real variable
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Automatic “type-casting” to wreal when a wire is hierarchically connected to a wreal, SystemVerilog real variable, or VHDL real signal
