Product Documentation
Real Number Modeling Guide
Product Version 22.09, September 2022

Built-In Real Nettypes

Cadence provides a pre-compiled SV Package (cds_rnm_pkg) of wreal-like nettypes, available for import. This allows you to reuse and migrate the Verilog-AMS code to SV. 

You can enable real number modeling in SystemVerilog by creating a set of built-in nettypes with real (scalar or typedef) data type and built-in resolution functions, equivalent to the wreal resolution functions. The SV built-in resolution functions and their equivalent wreal types are shown in the following table:

Built-In Resolution Functions

Built-in Resolution Function

Equivalent Wreal Type

Resolved Value

CDS_res_wreal1driver

wreal1driver

Only 1 active driver

CDS_res_wreal4state

wreal4state

1 active driver, unless same value

CDS_res_wrealmin

wrealmin

Least driver

CDS_res_wrealmax

wrealmax

Largest driver

CDS_res_wrealsum

wrealsum

Summed value

CDS_res_wrealavg

wrealavg

Average value

A built-in real SV nettype can be declared using the nettype command as follows:

nettype real wrealavg with CDS_res_wrealavg

Where:

wrealavg is the identifier that you use for nettype and CDS_res_wrealavg is a Cadence built-in resolution function.

You can also use another name for an existing built-in nettype, as shown below.

nettype real wrealavg with CDS_res_wrealavg; //declare a built-in nettype "wrealavg"

nettype wrealavg myWrealAvg; //rename wrealavg to myWrealAvg

Once a built-in nettype has been declared, a net of the built-in nettype can be used just like a net of any other user-defined nettype (UDN) as governed by the SV LRM.

nettype real wrealavg with CDS_res_wrealavg; //declare a built-in nettype "wrealavg"
wrealavg x;           //declare a singular net of nettype "wrealavg"
wrealavg x [0:3];    // declare a 4-element array of nets of nettype "wrealavg"

You can easily port existing wreal models to SV by using the cds_rnm_pkg package that defines a set of built-in nettypes that are equivalent to the typed wreal nets. For example, a simple Verilog-AMS wreal module

module real_model(x);

   input x [0:3];
   wrealavg x [0:3];
   child C(x);
endmodule

can be ported to use SV nettypes by simply importing the cds_rnm_pkg package, as shown below.

import cds_rnm_pkg::*;

module real_model(x);

   input x [0:3];
   wrealavg x [0:3];
   child C(x);
endmodule

The package is included in the Xcelium installation at $INSTALL_ROOT/tools/affirma_ams/etc/dms/cds_rnm_pkg.sv. When the software is installed, the package is compiled into a new INSTALL_ROOT/tools/affirma_ams/etc/dms/dmsLib directory. The package is automatically appended to the xrun command line and is available for import in all SV modules that xrun is compiling.

You do not have to import  when you only want to use the CDS_res_wreal* resolution functions.

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