SPICE-on-Top

The AMS Designer simulator supports SPICE-on-Top configurations, where a SPICE file contains the top-level SPICE blocks or the top-level Verilog/SystemVerilog blocks.

To run a SPICE-on-Top design, you use the -spicetop option with the xrun command.

For example:

xrun xtop.scs foo.v <other xrun options> -spicetop

where:

foo.v is verilog file in which a Verilog block is defined as top level module reference in spice-on-top.
xtop.scs contains the SPICE blocks and an amsd block as follows:

amsd{
portmap module=foo
config cell=foo use=hdl
ie vsup=1.8
}

The following example illustrates a SystemVerilog block in the Spice-on-Top configurations:

xrun sv_child.sv top.scs -spicetop -timescale 1ns/1ps

where, top.scs contains the SPICE blocks and an amsd block as follows:

//top.scs

include "./top.sp"

amsd {
portmap module= sv_child
config cell=sv_child use=hdl
ie vsup=1.8
}

simulator lang=spectre
tran tran stop=500ns

//top.sp

simulator lang=spice
x1 a1 b1 c1 top_spice

.subckt top_spice a b c
v1 ( a 0) vsource dc=5
v2 ( b 0) vsource dc=5

x2 a b c sv_child
.ends

x3 a2 b2 c2 sv_child

.subckt sv_child a b c
.ends

And, the SystemVerilog block is defined in the sv_child.sv file, as follows:

module sv_child (in1,in2,out);
input real in1,in2;
output real out;

always @(in1 or in2)
begin
out=in1 + in2;
end

initial $monitor ("Values in child::%g,\t%g,\t%g", in1, in2,out);
endmodule

SPICE-on-Top

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