Update Components and Nets Form
Use the Update Components and Nets form to automatically update your layout to take account of the instances, pins, and connectivity you have changed in the schematic.
The Update Components and Nets form consists of the following tabs.
Update
The following table describes the fields available on the Update tab of the Update Components and Net form.
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This section lets you specify how much of the design is updated and what happens to existing layout components that need to be changed or removed from the design |
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Updates only the instances and pins currently selected in the layout window. This option automatically disables the generation of new components. However, if the Update Instance Masters option is enabled and set to Creating a New, Layout XL may generate new instances to replace existing instances with incorrect masters; you have the option to switch on Chain, Fold, and Chain Folds for these new instances. |
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Specifies that only net assignments and instance, terminal, and net names are updated. Enabling this option also automatically preserves user-defined mappings. All other options on the form are disabled except Update Selected Layout Components Only. If any pins have got swapped due to a schematic ECO, running the Update with Update Nets and Instance Name Mismatches Only selected ensures that the original pin positions are retained in the layout. To reflect the pin swaps in the layout, run the Update with Update Nets and Instance Name Mismatches Only deselected. Environment variable: updateNetsOnly |
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Specifies that the signal types assigned to nets in the schematic are updated in the layout view. The signal types can be set in the schematic and are automatically transferred to the layout during Generate All From Source. However, once set, the signal type of a net can be manually updated using the Property Editor assistant. If the signal type of a net is changed in the schematic, the Update Net Signal Types option can be used to update the layout to keep the two views in sync. Environment variable: updateNetSigType |
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Specifies that the minimum and maximum voltages assigned to nets in the schematic are updated in the layout view. Environment variable: updateNetMinMaxVoltage Only those voltages that are manually set on the schematic net are updated in the layout view. Layout versus schematic mismatches that may arise due to this selective transfer of voltages are not reported by the Check Against Source command. |
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Updates an existing instance that uses an incorrect master to use the correct master.
When set to Creating a New, the command puts a marker on the instance with the incorrect master and renames it name Because you are creating a new instance, you can optionally enable Chain, Fold, and Chain Folds in this mode. Environment variable: updateWithMarkers |
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Deletes layout pins that are no longer present in the schematic. Redundant nets and terminals are deleted from the layout view at the same time. When switched off, unmatched pins are not deleted but are instead indicated with a marker in the layout view. Environment variable: deleteUnmatchedPins |
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Deletes layout instances that are no longer present in the schematic. When switched off, unmatched instances are not deleted but are instead indicated with a marker in the layout view. Environment variable: deleteUnmatchedInsts |
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Updates the parameters and parameter values automatically on layout instances to match those on their schematic counterparts. Parameters that are set in layout instances but are not present on their schematic counterparts are not removed. Environment variable: updateLayoutParameters |
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Places instances automatically below the PR boundary if they overlap other instances during the update. The overlapping instances are the ones that have changed in size, and if placed at their original location, may overlap other unchanged instances.This data is then used by the Virtuoso Custom Digital Placer (VCP) for Eco Mode placement. Environment variable: updatePlaceBelowBoundary |
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This section lets you specify which missing design objects are generated in the layout view. |
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Generates instances that are in the schematic but are not currently in the layout. |
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Automatically abuts transistors into chains during layout generation. |
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Automatically divides devices into folds to prevent the gate width from exceeding a specified size. Environment variable: initDoFolding
If the disableFolding environment variable is set and the folding threshold for the component type is set to |
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Chains the individual folds of a transistor automatically. Environment variable: initDoStacking For the Chain Folds option to be available, only the Fold check box must be selected. If you select the Chain check box as well, Chain Folds is deactivated. |
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Generates all the pins listed on the I/O Pins tab. The generated pins are automatically snapped to the placement grid. Environment variable: initCreatePins |
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Stops Layout XL generating layout pins for the global nets in the schematic. |
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Stops Layout XL from generating layout pins for schematic pins that are connected to I/O pads (cells of type Environment variable: initCreatePadPins |
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Regenerates the new PR boundary based on the settings on the PR Boundary tab. All placements and estimations are based on the generated PR boundary. When switched off, the existing boundary is retained. |
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Generates a rectangular snap boundary that encloses the generated PR boundary. You can generate a snap boundary only if the PR Boundary option is switched on. Environment variable: initCreateSnapBoundary |
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Environment variable: initCreateMTM |
I/O Pins
The following table describes the fields available on the I/O Pins tab of the Update Components and Net form .
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This section lets you specify attribute values and Apply them to all the pins shown in the list box. Click Apply to apply the Layer, Width, Height, Num, and Create settings for all the listed pins. |
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Specifies the layer on which the pin is generated. The cyclic field lists only the conducting layers.
You can use the See validLayers.
Else, it is the first extractable layer in the technology file that has a
Layers are extracted from the |
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Specifies the width for each pin. The default is the |
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Specifies the height for each pin. The default is the |
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Specifies how many instances of this pin to generate. If you type 0, the pin is not generated. |
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This section lets you select pins from the list box and update the attribute values used when those pins are generated in the layout. Click Update to update the Layer, Width, Height, Num, and Create settings for the currently selected pins. |
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Lets you type in a complete or partial pin name to select one or more pins in the list box. |
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Displays the number of pin with names that match the string you typed into the Select field. |
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Opens the Add A New Pin Form dialog, where you can specify the name of a terminal for which to generate a new pin. This option is available when you right-click in the Specify Pins to be Generated section. |
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Specifies the schematic terminal name. You cannot change this value. |
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Specifies the net associated with the pin in the layout. You cannot change this value. If terminal and net names differ in the schematic, Layout XL generates a pin with the same name as the schematic terminal and a net with the same name as the net attached to the terminal in the schematic. If there is no explicit net label in the schematic, both the pin and the net name in the layout are the same as the schematic terminal. This is the default behavior. |
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Specifies the layer on which the selected pins are generated. The cyclic field offers only the conducting layers. The default is the current drawing layer if it is defined as an extractable layer in the technology file. Otherwise, it is the first extractable layer found. If there are no extractable layers, the cyclic field lists all valid layout layers. |
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Specifies the width for each selected pin. The default is the |
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Specifies the height for each selected pin. The default is the |
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Specifies how many instances of each selected pin are generated. If you type 0, the selected pin is not generated. |
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Specifies whether or not the selected pins are to be generated in the layout. To limit the number of pins that are displayed in the pin table, you can set generatePinsDisplayLimit to the required display limit. If the design includes more pins than the number allowed to display in the form, the additional pins are suppressed and the form is updated to mention the number of suppressed pins. You can right-click the suppressed pin notification, and choose Un-suppress to display all the pins. |
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This section lets you specify the type of label generated when you create a pin. This setting is honored by the Generate All From Source and Generate Selected From Source commands. |
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Specifies whether a pin label is created when the pin is generated. You can choose to create either a Label object or a Text Display. Environment variable: initIOLabelType Click the Options button to access the Set Pin Label Text Style Form, where you can set the size, font, style, justification and orientation of the label lettering, and the drawing or pin layer on which the labels are displayed.
If your pin labels are not visible in the canvas, turn on the Pin Names option in the Display Options form. For this setting to take effect, you must set the |
PR Boundary
The following table describes the fields available on the PR Boundary tab of the Update Components and Net form.
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This section lets you specify whether the place and route boundary is a rectangle or a polygon |
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Specifies a rectangular place and route boundary. Use the Area Estimation group box to specify how the size of the boundary is calculated. |
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Specifies the coordinates of the boundary’s origin. The default is (0.0 0.0). |
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Specifies a polygonal boundary. Use the Points List to specify the coordinates of each of the vertices of the polygon. |
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This section lets you specify how the system calculates the shape and size of a rectangular boundary. Area estimation comprises two parts: the first specifies the aspect ratio and utilization of the boundary; the second estimates the size of boundary required to accommodate the components to be generated. To specify the aspect ratio and utilization, set two of the following four parameters. Choose one of the parameters from the first cyclic list and any one of the remaining valid choices from the second cyclic list. |
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Specifies the percentage of area within the cell boundary that you want to fill. The default is Environment variable: initUtilization When the Chain, Fold, or Chain Folds options are switched on in the Generate tab, the Utilization value is applied only after chaining and folding is complete so that the size of the boundary is calculated accurately. |
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Specifies the width-to-height ratio of the design boundary. A value of 1 specifies a square boundary; 0.5 specifies a boundary twice as high as it is wide; and 2 specifies a boundary twice as wide as it is high. The default is Environment variable: initAspectRatio and initAspectRatioOption |
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Specifies the width of the design boundary. The default is the size of the last boundary or Environment variable: initPrBoundaryW |
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Specifies the height of the design boundary. The default is the size of the last boundary or Environment variable: initPrBoundaryH |
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Calculates the area based on the sum of the areas enclosed by all the place and route boundaries of the components to be updated. |
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Calculates the area based on the sum of the areas enclosed by all the bounding boxes of the components to be updated. |
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Opens the Add Area Estimators Form, which lets you register a user-defined SKILL function to estimate the area enclosed by a PR boundary or by the area boundary of a virtual hierarchy block. The SKILL function registered for estimating the PR boundary appears in the Estimator drop-down list and can be used to estimate the area of the top-level boundary when updating a layout. The SKILL function registered for estimating the area boundary appears in the Soft Block – Area drop-down list and can be used to estimate the area of the virtual hierarchies when updating a layout.
If you specified |
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This section lets you specify how the area boundary of a virtual hierarchy is estimated. This group box is available only when you have the Layout EXL or higher license checked out. |
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Specifies the distance from the objects inside the virtual hierarchy at which the area boundary is created. |
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Specifies the acceptable area utilization percentage for deriving the size of the area boundary for the virtual hierarchy.
Environment variable: |
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Specifies that the selected area boundary settings be used for creating virtual hierarchy area boundaries only at the top level. |
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Specifies that the selected area boundary settings be used for creating virtual hierarchy area boundaries at all levels within the virtual hierarchy of the top-level design. |
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Specifies that the virtual hierarchy area boundaries are not created, instead existing virtual hierarchy boundaries are used. |
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This section lets you specify the area of a soft block to be created. This group box is available only when you have the Layout EXL or higher license checked out. |
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Specifies the area of the soft blocks to be created.LLIf a SKILL function has been registered to estimate the area of a virtual hierarchy, the function appears in the drop-down list associated with the Area field. The same area estimator function can be accessed using the Adjust Area Boundary form in the Virtuoso Design Planner.
Environment variable: |
Hierarchy
The following table describes the fields available on the Hierarchy tab of the Update Components and Net form.
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This section lets you specify the extent in the hierarchy to which the design is updated |
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Specifies that the selected updates are carried out to all the nontransparent cellviews in the design hierarchy. When this option is enabled, the Generate – PR Boundary option on the Update tab is disabled to prevent recreating the PR boundaries across the hierarchy. |
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This section lets you specify if the virtual hierarchy is updated to match the schematic hierarchy and if soft blocks are automatically generated for missing layouts. The group box is available only when you have the Layout EXL higher license checked out. |
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Lets you generate a virtual hierarchy using the area boundary options selected in the PR Boundary tab, or updates an existing virtual hierarchy to match the schematic hierarchy. When updating an existing virtual hierarchy, the area boundary of the virtual hierarchy is not updated.
Environment variable: |
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Lets you generate soft blocks for top-level virtual hierarchy blocks that have no schematics available or have schematics with only pins but no instances or physical binding. For the virtual hierarchy blocks that have no schematic available, soft block generation uses the bound symbol view to generate pins. Soft block boundary is generated using the options defined on the PR Boundary tab.
Environment variable: |
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Updates the soft block in the layout to match the schematic symbol.
Environment variable: |
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Auto place generated instances inside existing virtual hierarchy |
Places instances missing from a virtual hierarchy inside the virtual hierarchy automatically, retaining the placement of the existing instances. After placement, if the virtual hierarchy contents extend beyond the area boundary and the area boundary is rectangular, the boundary automatically adjusts to enclose the contents. Rectilinear area boundaries that have their contents extending beyond the boundary need to be manually adjusted and placed. For the generated instances to be automatically placed inside an existing virtual hierarchy, the placement status of the virtual hierarchy should be set to None. |
Related Topics
Creating and Registering a User-Defined Area Estimation Function
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