Model Equations

RC Circuit Model for Inversion Charge

(-1)

Parameter Initializing

Capacitance of Oxide and Body Factors

(-2)

(-3)

If QMC>0,

(-4)

else

(-5)

qq=0.

(-6)

Initializing Parameters

Temperature-Related Parameters

(-7)

General Parameters

(-8)

Parameters Related to Polysilicon and Overlap Regions

(-9)

Fringing Capacitance

(-10)

Resistances

(-11)

Gate Tunneling Parameters

(-12)

Static Evaluations

(-13)

where Vc is the voltage across the capacitor C.

(-14)

Calculation of Surface Potential at the Channel Side

A macro
is defined to calculate the surface potential at the channel side with output xs, and inputs: xns, ns, G, G2, G-2, ,
, xmrg.

(-15)

(-16)

Calculation of Surface Potential at the Overlap Regions

A macro
is defined to calculate the surface potential at the channel side with output xov, and inputs: xg, Gov, Gov2, xmrgov, ,
, xg1.

(-17)

Surface Potential Without Poly Effect

(-18)

Surface Potential With Poly Effect

The following calculates the poly surface potential when NPO < 1027.

(-19)

Static Inversion Charge Calculations

The following calculates the surface potential-related variables and inversion charge:

(-20)

If xg <=0, qis=0

When xg >0, (namely the depletion and inversion regions) following is performed to find qis and qeff:

(-21)

(-22)

The normalized static inversion charge is:

(-23)

Qi0 = -qis

Time-Dependent Silicon Surface Potential Without Poly Effect

(-24)

where Vn is the voltage at the internal time constant node n.

(-25)

where
calculates the normalized surface potential as defined in Calculation of Surface Potential at the Overlap Regions.

(-26)

Time-Dependent Poly Surface Potential Calculation Correction

If NPO >= 1027, =0, otherwise, the following procedure is used:

(-27)

Quantum Mechanical Corrections

(-28)

The following Cox,qm calculation is for all regions (xg <=0 and xg >0)

(-29)

Accumulation Resistance Bias Dependence

(-30)

Calculation of Gate Tunneling Current

A macro Igate is defined as a function of Igin, IginHVB, Eg, Vov, Dch, Dch, HVB, INVCHIB, INVCHIB, HVB, GC2O, GC3O, GC2HVO, GC3HVO, QCQ, QCQ, HVB, Ig, type, xs, b, s, b, ov, , TYPEP, TYPE, Vb,ig, BOV, and BOV, HVB as shown in the following with Igout as output. It is used for the calculation of gate tunneling current.

(-31)

(-32)

Gate Tunneling Current

(-33)

Initially, IGC=0.0 and IGOV=0.0.

If SWIGATE=true

(-34)

Terminal Currents

DC Currents

(-35)

Current through the gate Ig,DC=

(-36)

Current through the gate Ib,DC=

Terminal Charges

Total charges at the gate

(-37)

Total charges at the bulk

(-38)

Noise

Thermal Noise

Thermal noise contributions from rgsal, rgpv, rend, rsub and rac0 are calculated when SWRES = 1.

When SWRES = 0, the noise contribution is 0. This is realized in the code by setting Ggsal, Ggpv, Gend, Gsub, and Gac0 to 0.

Following are the equations for thermal noise calculation:

(-39)

(-40)

Shot Noise

Shot noise contributions from the gate tunneling current are calculated when when SWIGATE=1. Following are the equations for shot noise calculation:

(-41)

Parameter Extraction

Capacitance-Related Model Parameter Extraction

(-42)

where C₀ is the bias-dependent capacitance of an intrinsic device,

(-43)

and m is the multiplicity factor. Parameters DWQ and DLQ describe the deviations of the effective channel length (L) and Width (W) from their drawn values L_g and W_g.

The total fringe capacitance is given by

Auxiliary Equations

(-44)

Related Topics

PSP-Based MOS Varactor Model (mosvar)

Model Version Updates

Model Usage

Component Statements

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