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Contents

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1

Introducing VHDL In

Licensing Requirements

Uses of VHDL In

Other Cadence Products Used with VHDL In

The ncvhdl Parser

Design Flow Using VHDL In

VHDL In Software Directory

Starting Options and Requirements

Starting Options

Input Requirements

Conversion Limitations

1

Getting Started with VHDL In

Introduction

Setting Up the Library Environment

Setting Up the cds.lib File

Using the Text Editor

Using the CIW

Starting VHDL In in Standalone Mode

Starting VHDL In with Virtuoso Studio Design Environment

CIW Menu Options

Using SKILL APIs

1

VHDL In Forms

VHDL Import Form

Import Options

Power

Ground

Schematic Generation Options Tab Page

1

Importing a Simple VHDL Design

Introduction to the Example Design

Checklist Before Importing a Design

Setting Up the Library Environment

Importing to VHDL Cells

Setting Up the VHDL Import Form

Creating a New Target Library

Viewing the Results

Importing to a Netlist

Setting Up the VHDL Import Form

Creating a New Target Library

Viewing the Results

Importing to a Schematic

Setting Up the VHDL Import Form

Creating a New Target Library

Viewing the Results

1

Importing a Complex VHDL Design (RISC Processor Unit)

Overview

RPU Design Structure

Setting Up the VHDL Import Form

Specifying Schematic Generation Options

Creating a Target Library

Viewing Error and Log Files

Viewing the Results

Accessing the Symbol Editor

Viewing the Schematic

1

Conversion Issues

Introduction

Binding Issues

One Component, Multiple Entity/Architecture Pairs

One Entity, Multiple Components

Case Sensitivity Issues

Possible VHDL Design Import Errors

Object Search in OA

Other Issues

Signal Declarations

Vector Nets

Noninteger Vector Indices

Buffer Ports

Port Conversion Functions

Attribute Specifications

Importing Generics

Component Declarations

Port Maps

Concurrent Assignment Statements

Behavioral View for Continuous Signal Assignment Statements

Power and Ground Signals

Nontranslatable Structural VHDL Constructs

Port Subtypes and Modes

Constructs in Architectures

1

Error Messages

Dialog Boxes

File Name Does Not Exist

No Target Library Name Specified

Library Name Not Found

Import Completed Successfully

Import Completed with Errors/Warnings

Import Aborted When Reached Maximum Errors

Text String Error Messages

Overview

Line Command Errors

Analyzer Errors

Parameter File Parsing

Virtuoso Design Library

Memory

General Errors

Using the VHDL Tool Box Status Window

1

Creating a Parameter File

Parameter File Structure

Description of Parameters

1

VHDL In Standalone Options

Introduction

Getting Help on a VHDL In Command

Displaying the Version Number of VHDL In

Suppressing Printing of the Copyright Banner

Hiding the Display of Schematic Extraction Errors

Specifying a cds.lib File

Compiling Functional Cellviews

Specifying the VHDL WORK Library

Ignore Extra Pins on Symbols

Speeding Up Run Time

Specifying a Schematic Parameter File

Specifying Multiple VHDL Source Files

TDM and Imported VHDL Design Libraries

VHDL In operation in TDM Mode

Checking a Library into TDM

Enabling VHDL93 features

Glossary

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