Introduction
In this Guide
This document describes how to capture the power intent for your design using the Si2 Common Power Format (CPF), a standardized format for specifying power-saving techniques early in the design process, to deliver an end-to-end low-power design solution to IC engineers.
Chapter 2, "Creating a CPF File," shows all the commands needed in a complete CPF file for different advanced low power techniques. For more information about the CPF command syntax, refer to the Common Power Format Language Reference.
Note: For the sake of simplicity, the CPF creation described in this document assumes that you start with RTL code that does not contain any instantiations of low power logic.
Chapter 3, "Process of Creating the CPF Content," shows different approaches to create the CPF content.
Chapter 4, "Hierarchical Flow," shows the additional constructs you need to create a CPF file for a hierarchical flow.
Chapter 5, "Modeling Special Cells," shows how to model some of the special power cells needed to support the advanced low power techniques.
Cadence Tools Supporting the Common Power Format
Encounter Conformal Low Power
Encounter Digital Implementation System
Encounter Power System
Encounter RTL Compiler
Encounter Test Architect
Encounter Timing System
Incisive Enterprise Simulator
Incisive Palladium
Note: For information on the product option, feature, or package that supports CPF, contact your local sales or AE contact.
Refer to the product documentation of the tools for information on
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