Product Documentation
Virtuoso Photonics Solution Guide
Product Version IC23.1, August 2023

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Using EPDA in the Virtuoso Environment

The unified Electronics-Photonics Design Environment (EPDA) framework is built upon the Virtuoso® Design Framework, leveraging the three core applications of the design framework—Virtuoso® Schematic Editor, Virtuoso® Analog Design Environment, and Virtuoso® Layout Suite. To enable a true co-simulation methodology within the Virtuoso Studio, the EPDA framework supports optical signal simulation in Cadence® Virtuoso® Analog Design Environment using the Lumerical® Interconnect Photonic Integrated Circuit (PIC) simulator. For more information about the Lumerical PIC simulator, visit the Lumerical website.

The key advantage of using the EPDA framework for running the Virtuoso® Photonics® Solution is that Virtuoso supports the integration and implementation of optical signals largely in the same way as that for electrical signals. This makes it easy for both existing and new users to use Virtuoso for creating their electro-optical designs.

Specifying Technology Information

To enable the generation and update of optical pins, you can update the technology file to define an additional constraint group—virtuosoDefaultOpticalPinSetup.

If specified, the virtuosoDefaultOpticalPinSetup constraint group defines the optical layers to use for generating and updating the optical pins. You can use the opticalPinSetup environment variable to specify the name of the constraint group to use for optical pin generation.

You can also define the virtuosoDefaultElectricalPinSetup constraint group to specify the electrical layers to use for generating and updating electrical pins. To control the constraint group to use for electrical pin generation, use the electricalPinSetup environment variable.

If the virtuosoDefaultOpticalPinSetup or the virtuosoDefaultElectricalPinSetup constraint group is not defined, Virtuoso uses the validLayers defined in the default Layout EXL constraint group—virtuosoDefaultSetup—for pin generation.

Launching Virtuoso in Photonics Mode

Depending on whether or not you already have the Virtuoso licenses available, you can launch Photonics using one of the following licensing options:

Virtuoso Photonics Solution, irrespective of the license you choose, is supported only in Layout EXL.

Launching the Virtuoso Photonics Option

If you already have access to the Virtuoso design environment, you can invoke the additional Photonics capabilities supported in Virtuoso by using the Virtuoso Photonics Option (VPO) license.

To check out the Virtuoso Photonics Option license, set the following shell environment variables:

setenv Virtuoso_Photonics_Option t
setenv Virtuoso_MultiTech t

Launching the Virtuoso Photonics Platform

If you do not already have a dedicated license to access the Virtuoso design environment, you can check out a single, platform-level license called the Virtuoso Photonics Platform (VPP). This license enables all the Virtuoso design environment capabilities required for running the Photonics solution in addition to enabling the Virtuoso Photonics Solution.

To check out the Virtuoso Photonics Platform license, set the following shell environment variable:

setenv Virtuoso_Photonics_Platform t

Verifying the Photonics License

To verify whether the required Virtuoso Photonics Solution licenses are checked out and that the EPDA framework is being enabled, check that the Command Interpreter Window (CIW) issues the confirmation messages as highlighted in the screenshot below. The CIW is the first window that opens when a Virtuoso session is launched.

Alternatively you can look for these confirmatory messages in the Virtuoso log file, which is saved by default as CDS.log in the home directory.

Related Information

Licensing in Design Framework II

Using the Command Interpreter Window

Generating Layout

In Virtuoso, you can use the Virtuoso Suite EXL layout editor (Layout EXL) to generate a single layout that allows you to define an initial placement of the electrical and optical components in the design.

This sections covers the following topics.

Opening the Library Manager

All elements of a Virtuoso design—symbols, schematics, and layouts—belong to a library. Virtuoso can support several libraries simultaneously and a Virtuoso designer often works in a design library, which references a given fabrication process and uses the elements recommended for that process. Such a library is called a process library and it contains technology definitions in addition to containing information about basic devices. Optionally, a designer can use additional design elements from another library, called the reference library.

Virtuoso also supports some generic, process-independent libraries, such as basic and analogLib, which include common design elements.

The generic libraries do not contain layout implementations for any elements.

To access the various libraries, you can open the Library Manager form in stand-alone mode from an xterm or a command line window or within the Virtuoso design environment using the CIW.

To open the Library Manager in standalone mode:

The Library Manager appears as a stand-alone application, which is not integrated in the Virtuoso design environment.

In stand-alone mode, you cannot open cellviews.

To open the Library Manager in Virtuoso Design Environment:

The Library Manager form is displayed in the Virtuoso design environment as displayed in the figure.

Related Information

Library Manager Form

Creating a New Library

In Virtuoso, you can create a new library using one of the following methods:

Creating a New Library using the Library Manager

To create a new library using the Library Manager:

  1. In the Library Manager, choose File – New – Library.
    Alternatively, you can click inside the Library list box and press Ctrl+N on the keyboard.
    You can also type the name of the library in the Library field and press Ctrl+N to open the New Library form. In this case, the Name field in the New Library form is automatically populated with the name that you have entered in the Library field.
    The New Library Form is displayed.
    Creating a new or temporary library within an existing library is not allowed because any directories within a library are handled as cells.
  2. In the Name field, type the name of the library you want to create.
    The new library name cannot be the same as another library.
  3. The Directory navigation tools (list boxes and toolbar buttons) to specify the destination directory in which you want to create the new library. You can also type a directory path in the Directory field.
    You must have permission to edit the directory in which you want to create a library.
    If you want the library to be under design management control, you must create it in a managed project area. For additional information about creating managed libraries, see the Virtuoso Software Licensing and Configuration Guide.
  4. (Optional) In the Design Manager group box, specify whether you want to use a design management system.
    • If you want to use a design management system, select Use <design management system> (the default).
    • If you do not want to use a design management system, select Use No DM.
      If there is no design management system available, No design manager setup found will be displayed.
    For more information about design management systems, see Design Manager.
  5. You can select the Compression Enabled check box to write OpenAccess data to this library in a compressed format. For more information, see Compressing a Library Using Library Manager.
  6. Click OK.
    The Technology File for New Library form is displayed.
  7. Choose the Reference existing technology libraries technology file options.
    For more information about the various technology files options, see Technology File for New Library Form.
    For more information about technology files, see the Virtuoso Technology Data User Guide.

Creating a New Library Using the CIW

To create a new library using the CIW:

  1. From the CIW, select File – New – Library.
    The New Library form is displayed.
    Creating a new or temporary library within an existing library is not allowed because any directories within a library are handled as cells.
  2. Enter a Name for your new library.
  3. (Optional) Choose the name of the Directory (non-library directories) that you want to store your library in. Otherwise, you can specify the library path in the text box under the Directory (non-library directories) section.
    By default, the library will be created and stored in the current directory.
  4. Choose the Reference existing technology libraries technology file options.
    For more information about the various technology files options, see Technology File for New Library Form..
    For more information about technology files, see the Virtuoso Technology Data User Guide.
  5. In the Reference Existing Technology Libraries form, double-click the gopdk library in the left column to move it to the right column.
    Alternatively, you can move items from one column to the other by selecting the item and then clicking the appropriate arrow key to specify the direction of move.
    The new library is created.
  6. Create a new layout cellview to verify if you have referenced the appropriate technology. See Creating a Layout Cellview.
  7. In the layout cellview opened in Layout EXL, right-click the menu bar and choose Assistants – Palette.
  8. The layout cellview displays the Palette assistant, as shown in the figure below. You can use the Palette assistant to verify that the layers required for running the Virtuoso Photonics Flow are supported.

Related Information

Palette Assistant

Creating a New Library Cellview

To create a new cellview:

  1. Open the Library Manager.
    Alternatively, you can also create a new cellview from the CIW by following the same instructions.
  2. Choose File – New – Cell View.
    Alternatively, you can click inside the Cell or View list box and press Ctrl+N on the keyboard.
    The New File form is displayed.
    You can also type the name of the cell in the Cell field and press Ctrl+N to open the New File form. In this case, the Cell field in the New File form is automatically populated with the name that you have entered in the Cell field of the Library Manager form.
  3. In the Library drop-down list, choose the name of the library in which you want to create a new cellview.
  4. In the Cell field, type a cell name for the new cellview.
  5. In the View field, type a view name for the new cellview.
  6. In the Type drop-down list, choose the type of view to be opened.
  7. In the Application section, select Layout EXL.
  8. (Optional) Select Always use this application for this type of file to always open the selected application when the selected view type is opened.
  9. Click OK.

The new cellview opens in the selected application.

Related Information

Creating a Layout Cellview

Creating a Schematic Cellview

In Virtuoso, the schematic representation of the design forms the starting point for a design. As in the electrical flow, the schematic is also used to launch the circuit simulation and to generate a layout in the Virtuoso Photonics Flow. You can also update the schematic based on any design decisions made during the simulation or layout generation. After the layout updates have been backannotated to the schematic, you can use the updated schematic to run any verification checks. Therefore, it is important to create a good schematic design that can serve all these purposes and help generate a connectivity-driven, correct-by-construction layout. For more information on creating schematics in Virtuoso, see the Virtuoso Schematic Editor User Guide.

Virtuoso supports the implementation of photonic Pcells in the same manner as that of electrical ones. Therefore, when you are in the EPDA framework, most of the Virtuoso features will continue to work the same way as in the pure electrical flow.

To launch the Virtuoso Schematic Editor to create a new schematic cellview:

  1. Open the Library Manager.
    Alternatively, you can create a new cellview from the CIW by following the same instructions.
  2. Choose File – New – Cell View.
    Alternatively, you can click inside the Cell or View list box and press Ctrl+N on the keyboard.
    The New File form is displayed.
  3. In the Library drop-down list, choose the name of the library in which you want to create a new cellview.
    If you have created any new libraries, they should be available in the list.
  4. In the Cell field, type a cell name for the new cellview.
  5. In the View field, type schematic to open the cell in the schematic view.
  6. In the Type drop-down list, choose schematic.
  7. In the Application section, choose Schematics XL.
  8. Select Always use this application for this type of file to always open the selected application when the selected view type is opened.
  9. Choose the appropriate Open for option.
  10. Click OK.
    The new cellview opens in the selected application, as shown in the figure below.

Related Information

Creating Schematics

Opening a Schematic Cellview

To open an existing schematic cellview:

  1. Open the Library Manager.
    You can also open a new cellview from the CIW by following the same instructions.
  2. Choose File – Open – Cell View. Alternatively, you can click inside the Cell or View list box and press Ctrl+N on the keyboard.
    The Open File form is displayed.
  3. In the Library drop-down list, choose the name of the library from which you want to open the schematic cellview.
    If you have created any new libraries, they should be available in the list.
  4. In the Cell field, type the name of the cell to open.
  5. In the View drop-down list, choose schematic.
  6. In the Application section, choose Schematics L.
  7. Click OK.
    The schematic cellview opens in the Virtuoso Schematic Editor window. If the schematic you opened includes both electrical and optical connections, the schematic editor displays the connections differently.

Related Information

Creating Schematics

Creating a Layout Cellview

To create a layout cellview:

  1. Open the Library Manager.
    Alternatively, you can create a new cellview from the CIW by following the same instructions.
  2. Choose File – New – Cell View.
    Alternatively, you can click inside the Cell or View list box and press Ctrl+N on the keyboard.
    The New File form is displayed.
  3. In the Library drop-down list, choose the name of the library in which you want to create a new cellview.
    If you have created any new libraries, they should be available in the list.
  4. In the Cell field, type a cell name for the new cellview.
  5. In the View field, type layout to open the cell in the layout view.
  6. In the Type drop-down list, choose layout.
  7. In the Application section, choose Layout EXL.
    The Virtuoso Photonics Flow is supported only in the Layout EXL application.
  8. Select Always use this application for this type of file to always open the selected application when the selected view type is opened.
  9. Choose the appropriate Open for option.
  10. Click OK.
    The new cellview opens in the selected application.

Specifying the Components to be Generated

Use the Generate All From Source toolbar button to generate layout representations of the schematic design components. Alternatively, you can choose the Connectivity — Generate menu command to open the Generate Layout form.

For the schematic instances that have layout representations available, the Generate All From Source command creates corresponding layout views in the canvas.

To specify the components to be generated:

  1. In the Generate Layout form, select the Generate tab.
  2. In the Generate group box, select the Instances, I/O Pins, and PR Boundary options, as required.
    1. To chain transistors, select the Chain check box.
      For information on chaining optical pins, see Generating Optical Chains.
    2. To stop Layout EXL from generating layout pins for global nets in the schematic, select Except Global Pins.
  3. To preserve any user-defined binding of devices between the schematic and the layout, select Preserve User-Defined Bindings.
  4. Click OK.

Related Information

Generating All Components From Source

Specifying the I/O Pins to be Generated

You specify the pins to be generated on the I/O Pins tab of the Generate Layout form.

For each pin listed, the form shows the parameters that will be used to generate its equivalent in the layout. You can remove or change the specification of any of the listed pins, or add new pins to be generated.

When generating pins, Layout EXL uses the same naming convention as the Virtuoso Schematic Editor, allowing you to assign different names to terminals and nets. Where terminal and net names are different in the schematic, Layout EXL creates pins with the same terminal name as in the layout, even though the net name associated with the pin might be different.

Power and ground pins defined at a lower level of the design hierarchy are not listed on the I/O Pins tab but the pins are still generated in the layout view. Virtuoso issues a message in the CIW to notify you about the operation.

Specifying the Default Values for All Electrical Pins

To specify the default values for all electrical pins:

  1. In the Generate Layout form, select the I/O Pins tab.
  2. Select Type as Electrical.
    This option is available if the schematic has both electrical and optical pin types defined.
  3. Choose the default routing layer from the Layer cyclic field.
    The list of pin layers is obtained from the technology information applied to the design.
  4. Specify the default Height and Width of the electrical pins and the Number of pins you want to create.
  5. Click Apply.
    The specified values are applied to all the electrical pins displayed in the list box.

Related Information

Specifying the I/O Pins to be Generated

Defining the Optical Pin Attributes

When generating optical pins, Layout EXL uses the same naming convention as specified in the Virtuoso Schematic Editor, allowing you to assign different names to ports and nets. Where port and net names are different in the schematic, Layout EXL creates pins with the same terminal name as in the layout, even though the net name associated with the pin might be different.

If a pin is associated with an optical net, Layout EXL automatically generates optical pins on an optical layer, such as the waveguide layer. By default, the layer to be used for the optical pin generation is determined from the value set for the phoPinLayer environment variable. If the environment variable does not have a valid layer set, the first photonic layer in the validLayer list is used.

Each optical pin can have the following attributes defined:

Generating Optical Pins

To generate an optical pin in the layout:

  1. In the Generate Layout form, select the I/O Pins tab.
  2. Select Type as Optical.
    This option is available if the schematic has both electrical and optical pin types defined.
  3. Choose the default routing layer from the Layer cyclic field.
    The default pin layer is determined from the value set for the phoPinLayer environment variable.
  4. Specify the default Width, Radius, and Input Angle of the pins you want to create.
    The default value set for Input Angle applies only to the input pins. The output pins are set to a complementary angle value.
  5. Click Apply to generate the pins in the layout.

Updating Optical Pins

  1. In the Generate Layout form, select the I/O Pins tab.
  2. Select Type as Optical.
    This option is available if the schematic has both electrical and optical pin types defined.
  3. Specify the new Layer, Width, Radius, and Angle, as appropriate.
  4. Click the Update button.

The selected pins are updated.

Generating Selected From Layout

In Virtuoso Layout Suite EXL, if you have the Virtuoso_Photonics_Option license checked out, you can select unbound layout components and generate them in the schematic.

To generate the selected layout components in the corresponding schematic window:

  1. In the Layout EXL Navigator assistant, select the instances or terminals that display their XL Status as unbound.
  2. Choose Connectivity – Generate – Selected From Layout.
    Alternatively, click the Generate Selected From Layout button on the Layout XL toolbar.
    If the corresponding schematic cellview is read-only, a message is issued to prompt that the cellview be made editable.
    If the corresponding schematic cellview is editable and the schematic has not already been extracted, a dialog box pops up to ask if the schematic cellview can be extracted.
  3. Press F3 to display the Generate Selected From Layout form to customize how dummies are placed in the schematic. (Optional).
  4. Click OK to proceed with the extraction of the schematic cellview.
    The selected instances are added to the dragset and are available for placement in the schematic view.
  5. Click anywhere in the schematic canvas to place the selected instances.
    The selected instances are placed in a row in the schematic cellview, reflecting their layout connectivity. The XL Status of the instances in the layout view is updated to reflect the current status.
If the instance or terminal created in the schematic has a master difference with the layout, you can update the physical binding in CPH to resolve the mismatch.

Related Information

Generate Selected From Layout Form

lxHiGenerateSelectedFromLayout

Generating Layout

Abutting Photonic Elements

The Virtuoso Photonics Flow supports all the same abutment features for photonic elements as are supported for electronic elements. In addition, the flow allows a type of abutment, which aligns the center point of an optical port with the matching facet information (width, angle, or layer). This enables any-angle abutment support for photonic elements.

For photonic elements, abutment is triggered by overlapping photonics ports, provided the corresponding routing layers in the technology database have been set up to trace optical connectivity.

For photonic layouts, abutment is also enabled for optical pins of non-Pcell devices. If you set the phoAbutNonPcells environment variable to t, Layout EXL also supports the abutment of non-Pcell instances with Pcell instances and other non-Pcell instances. During non-Pcell abutment, top-level pins can abut with instance pins. By default, instance pins on the same pin layer are abutted and aligned at the center.

For photonic designs, waveguide abutment is also supported. However, for waveguide abutment to be possible, the two abutting waveguides must be perfectly aligned and the abutting ports must be on the same net. If the abutting waveguides result in any shorts, the corresponding markers are generated in the Annotation Browser assistant.

To workaround the following situations that could otherwise prevent abutment, you can set the phoAbutAutoAdjust environment variable to enable abutment.

Photonics devices can be spaced out in case of abutment failure when the spacing properties vxlInstSpacingDir and vxlInstSpacingRule are set correctly on the overlapping pin figures.

Related Information

Device Abutment

Generating Optical Chains

In the EPDA framework, you can use the following Layout XL commands to chain optical waveguide instances:

When using Generate All From Source and Update Components And Nets, the layout instances selected for chaining are checked using the phoIsWaveguide SKILL function to verify them as waveguide instances. If the selected instances are found to be waveguides, they are chained during layout generation.

However, when layout generation is being performed using the Generate Selected From Source command, all the connected optical devices are chained. The phoIsWaveguide SKILL function is not used in this case.

You can also chain waveguide instances and top-level photonic pins using the Virtuoso® Layout Suite XL Connectivity – Generate – Chained Devices command or use the context-sensitive Chain menu option. When the selected set includes only waveguide instances and photonic pins, the Chain context-sensitive menu has only the Default option enabled. The other menu options, Top, Center, and Bottom, are disabled in this case.

The following interactive chaining options are not supported for photonic devices:

Related Information

lxChain

Manual Device Abutment

Create Pin Options: Virtuoso Photonics Option

Composite Waveguide Editor Form

Abutment in Virtuoso Photonics Solution

Generating an Incremental Chain

When using the Virtuoso Photonics Solution, you can incrementally create a chain by adding an object to an anchor. An anchor can be an instance or a top-level pin object, or a group of such abutted objects, which retains its position after chaining.

When Incremental chaining is invoked on an anchor, Virtuoso prompts to select an appropriate object for chaining by highlighting the suitable chaining connections on the nets associated with the selected anchor. Select any of the objects connected to the highlighted connections. You can iteratively add instances to the chain until the Incremental chaining command is interrupted by pressing the Esc key.

To incrementally chain instances:

  1. In the layout canvas or the Navigator assistant, right-click an instance or a group of abutted objects to be used as an anchor.
  2. From the shortcut command, choose Chain – Incremental.
    All the candidate instances for chaining are highlighted in the layout canvas using probes.
  3. Select an object to be added to the chain.
    The selected object is added to the chain, with the anchor retaining its position.
  4. To add another object to the chain, select the object. Do this iteratively, if more objects must be added to the chain.
  5. To stop adding more objects to the chain, press the Esc key.

Related Information

lxHiIChain

Generating an Anchored Chain

When using the Virtuoso Photonics Solution, you can automatically chain instances by adding to a selected set of fixed anchors, using connectivity from the selected set. Anchor chaining allows chains to be created much faster compared to incremental chaining, which requires manually selecting each instance to be added to the chain.

To automatically create an anchored chain:

  1. In the layout canvas or the Navigator assistant, right-click an instance or a group of instances to be used as an anchor.
  2. From the shortcut command, choose Chain – Anchor.
    All the candidate instances for chaining are highlighted in the layout canvas using probes.

Editing Layout

Virtuoso Layout Suite EXL provides a lot of editing capabilities to work with electro-photonic layout designs. You can use the layout editor to create custom layouts or edit any existing layout. From supporting basic parameter updates to layout components to enabling editing of composite waveguides, the Virtuoso Layout Suite EXL editor is well-equipped to support the editing of a Virtuoso-enabled Photonic design.

Editing the Layout Parameters

Photonics elements are formed as a result of complex mathematical calculations used to generate shapes. Therefore, these elements are “wrapped” into a generator and can be controlled through parameters. In fact, all the elements, including interconnect elements such as waveguides in a Photonic Integrated Circuit are defined as fixed or Pcell instances that can be controlled using parameters. Electronic circuit designs in Virtuoso, on the other hand, use a different methodology where the interconnects (wires) are often defined as top-level shapes. Because most photonic elements in a Photonic Integrated Circuit can be controlled through parameters, these instances can be interactively controlled using the Property Editor assistant or the Instance Property form.

The Property Editor assistant enables you to view and edit object property values for all electrical and optical components in your design. By default, each property is displayed in a separate table row in the Property Editor.

The Property Editor table in the figure displays the properties for the selected CurvyCore® objects in the design.

For detailed information about the Property Editor user interface, how to work with it and how to edit property values, see The Property Editor Assistant in the Virtuoso Schematic Editor User Guide.

Editing the Composite Waveguides

In the Virtuoso Photonics Solution, Layout EXL enables you to use optical connections called waveguides in your design. When several such optical connections or waveguides are used in a design, the resultant waveguide is called a composite waveguide.

The Virtuoso Photonics Solution supports the generation of such composite waveguides using the Generate All From Source command and supports editing of the composite waveguides using the Composite Waveguide Editor. Each component of the composite waveguide is called an Element.

The Composite Waveguide Editor can be launched from both the editors, schematic and layout. If launched in the Schematic view, the Composite Waveguide Editor allows early estimation of the waveguide geometry.

The various ways you can launch the Composite Waveguide Editor in the schematic and layout view are:

Editing a waveguide can involve the following:

Adding a Waveguide Element

To add a waveguide element:

  1. In the layout canvas, select the composite waveguide instance to update.
    The Property Editor assistant populates to display the properties of the selected optical instance.
  2. In the Property Editor assistant, click the Ellipses (…) button corresponding to the Edit label displayed just above the Waveguide parameter list.
    The Composite Waveguide Editor displays.
  3. In the Composite Waveguide Editor, right-click an existing waveguide element to use as the reference and choose Add Before or Add After to specify the position of the element to add.
    The Add Element form displays.
  4. Specify the Library, Cell, and View to use for the new waveguide element.
  5. Click OK to apply the settings and close the editor.

A new waveguide element gets added at the position you specify.

Deleting a Waveguide Element

To delete a waveguide element:

  1. In the layout canvas, select the composite waveguide instance to update.
    The Property Editor assistant populates to display the properties of the selected optical instance.
  2. In the Property Editor assistant, click the Ellipses (…) button corresponding to the Edit label displayed just above the Waveguide parameter list.
    The Composite Waveguide Editor displays, listing the various waveguide elements that comprise the composite waveguide.
  3. In the Composite Waveguide Editor, right-click the waveguide element that you want to remove and choose Delete from the context-sensitive menu.
    The selected element is removed from the waveguide element list and from the layout canvas.
  4. Click OK to apply the settings and close the editor.

Changing the Position of a Waveguide Element

To change the position of an element in the composite waveguide:

  1. In the layout canvas, select the composite waveguide instance to update.
    The Property Editor assistant populates to display the properties of the selected optical instance.
  2. In the Property Editor assistant, click the Ellipses (…) button corresponding to the Edit label displayed just above the Waveguide parameter list.
    The Composite Waveguide Editor displays, listing the various waveguide elements that comprise the composite waveguide.
  3. In the Composite Waveguide Editor, right-click the waveguide element for which the position needs to be changed and choose Move Up or Move Down to specify the new position for the element.

The selected element is moved to the new position in the element list. The composite waveguide displayed in the layout canvas also reflects the element at its new position.

Adding an Optical Waveguide Connector

Optical waveguide connectors are complex waveguides that can automatically generate a waveguide layout by using basic input information such as curve type.

To add an optical connector:

  1. In the layout canvas, select the composite waveguide instances to connect.
  2. Right-click and choose Optical Connector from the context-sensitive instance menu.
    The Waveguide Connector for Optical Connections dialog box opens.
  3. From the Connector drop-down list, choose a connector type to use for connecting the selected waveguides.
    The second value in the listed Connector options indicates the style of the connector that will be created—curve, sine, and so on.
  4. Click OK.

An optical connector is created in the layout canvas based on the connector style you selected.

Rotating a Waveguide Element

If a composite waveguide has the rotation parameter set, you can rotate all the elements inside the composite waveguide by the specified rotation value. The rotation of the waveguide elements is determined based on the rotation value set on the individual waveguide elements and the value set on the composite waveguide.

Let us consider that a composite waveguide includes two waveguideStraight elements with rotation on each element set to 0. Let us also assume that the rotation of the composite waveguide is set to 45.

On canvas, both the waveguide elements are rotated by 45 degrees, which puts them at an effective rotation of 45 degrees. If the waveguideStraight elements were set to rotation of 45 and the composite waveguide was set to rotate by 45 degrees, the effective, on-canvas rotation of the waveguideStraight elements will be 90 degrees.

However, when you edit a composite waveguide using the Composite Waveguide Editor, the composite waveguide is considered to be at rotation 0. This allows editing the rotation of the individual waveguide elements without taking into account the rotation of the composite waveguide.

For more information on rotating objects using the Virtuoso Photonics Solution, see Rotating Objects: Virtuoso Photonics Solution in the Virtuoso Layout Suite XL: Basic Editing User Guide.

Related Information

Composite Waveguide Editor Form

Generating Optical Pins

Managing the Layout Constraints

Use the Constraint Manager assistant to add, modify, check or delete constraints in your design.

The Constraint Manager displays a full set of constraints for a design wherever you are in the design hierarchy and wherever the constraints were created in that hierarchy. It displays the constraints in a logical manner, and shows which constraints are currently met and which have been overridden during the course of the physical implementation.

The Constraint Manager user interface comprises two main component parts: the Constraint Manager table at the top, which lets you browse the constraints in your design and the Constraint Editor underneath it, which lets you change the values of one or more selected constraints.

For more information on the Constraint Manager toolbar, see Constraint Manager Toolbar.

Routing Layout

To complete the electrical routing, Virtuoso supports the use of assisted routing for Virtuoso Photonics Solution.

To run the assisted router, you can use the options available in the Virtuoso Space-based Router toolbar.

Notice the Lidar icon in the Virtuoso Space-based Router toolbar, which has been introduced to set the required Wire Editing capabilities for Photonic Integrated Circuits. Virtuoso supports automatic routing for photonic designs, following the same rules as defined for the electrical layers.

For more information on how to use the various advanced routing capabilities of the Virtuoso Space-based Router to plan an efficient routing run for the Photonic Integrated Circuit, see the Virtuoso Space-based Router User Guide.

Verifying Design

Checking a Layout Against a Schematic

To check the components in your layout view against the schematic view:

  1. From the layout window menu bar, choose Connectivity – Check – Against Source.
    The Check Against Source command is also available through the Check Against Source icon () in the Layout XL toolbar.
    The Check Against Source form is displayed.
  2. In the Check group box, choose the differences you want to report.
  3. In the Output group box, choose whether you want to open the CAS workspace or the Info window, or both, and specify whether you want to overwrite the log file from a previous CAS run, or append the results to the log file.
  4. Specify the name of the log file in which the report of the CAS run can be logged.
  5. Click OK to run the check.
    The schematic is extracted and the CAS report is generated and displayed based on the Output options that you selected.
    • If Open workspace is selected, Layout XL opens the CAS workspace to display the generated markers in the Annotation Browser CAS tab.
    • If Display info window is selected, the schematic versus layout differences for the selected checks are reported in an information window.
  6. In the Info window, choose File – Save As to save the report to an ASCII file.

Related Information

Check Against Source

Checking XL Compliance

To check if your design fulfills the compatibility criteria that allow it to fully leverage the connectivity-driven features of Virtuoso Layout Suite EXL, run the Connectivity – Check – XL Compliance command.

Alternatively, you can call the lxCheck SKILL function to verify XL-compliance of a layout. To check each unique layout master in the layout hierarchy, use the lxHierCheck SKILL function.

The XL Compliance check evaluates the design for device correspondence with the schematic and reports information about ungenerated and unbound devices, if any. The report is intended to help you resolve any XL-compliance issues beforehand so that you can take full advantage of the numerous connectivity-driven capabilities provided by Layout EXL for optimal layout generation.

The XL Compliance report is issued in CIW and you can choose to also display the report in HTML, if the xlComplianceHtmlOpen environment variable is set in accordance.

Related Information

Checking XL Compliance


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