Product Documentation

Virtuoso Electrically Aware Design Flow Guide
Product Version IC23.1, November 2023

Contents

1

Introduction to Virtuoso Electrically Aware Design Flow

Licensing Requirements

What is Electromigration?

A Snapshot of The Electrically Aware Design Flow

2

Running Simulations and Saving Electrical Data

Setting up Testbenches and Corners

Preparing the EAD Setup for Simulation

Enabling the EAD Mode

Specifying the Save Options

Specifying the Signals to Save Electrical Data

Choosing the Type of Current to be Saved

Choosing a Method to Save the Current Data

Selecting Signals to Save Currents

Running Simulations and Viewing Output Current Data

Viewing the Current Data

Viewing the Current Data for Reliability Analysis Results

Creating Datasets

Viewing Datasets

Filtering Signals in the EAD Results View

Working with VDR Datasets

Opening the VDR Dataset Form

Viewing Simulation Datasets

Deleting Simulation Datasets

Exporting Simulation Datasets

Viewing CSV Datasets

Creating a CSV Dataset

Deleting CSV Datasets

Exporting CSV Datasets

3

Running the Pre-Layout Electromigration Check

Setting Up Environment Variables for the Pre-EM check

Running the Pre-EM Check

Performing What-If Analysis Based on the Pre-EM Check Results

Preparing the Setup for What-If Analysis

Editing Terminal Currents in Datasets for What-If Analysis

Editing EM Temperature for What-If Analysis

4

Extracting Parasitics in the Layout View

Starting EAD Browser for a Layout

Starting EAD from a Layout Window

Starting EAD Browser

Starting Layout EAD from a Schematic View

Starting EAD from a Layout Window

The EAD Workspace

EAD Browser Toolbar

Extraction Corner and EM Dataset Controls

Viewing Resistance Paths between Terms

Changing Data Display in the EAD Browser

Toggling Dual Pane and Single Pane View

Sorting Columns

Showing and Hiding Columns

Creating Net Groups

Managing Net Groups

Managing EAD Setups

Preparing an EAD Setup

Saving an EAD Setup

Creating a New Setup

Referencing a New Setup

Loading an EAD Setup

Related Topics:

Editing Process Settings

Using Custom Variables in ICT-EM Files

Checking Layer Mapping

Deleting an EAD Setup

Working with EAD States

Saving an EAD State

Restoring an EAD State Automatically

Loading an EAD State

Extracting and Analyzing Parasitics

Overview of Parasitic Extraction in Layout EAD

Extracting Parasitics on Interconnect Wires Between Devices

Extracting Parasitics inside Devices

Extracting Parasitics for Devices and Interconnect

Extracting Parasitics for Devices and Overlapping Interconnect

Extracting Parasitics for Local Interconnect Layers

Extracting Parasitics from Strong, Weak, or Must Connections

Customizing Extraction of Parasitics

Assigning Shapes for Extraction

Preventing Extraction Inside Devices

Stopping Extraction at the Device Boundary

Specifying the Hierarchy Levels and Hierarchy Shape Type

Identifying Instances to be Ignored during Extraction

Modifying EM Analysis for Wide Pins

Extracting Parasitics in Layout EAD

High Precision C and R Extraction

Customizing High precision R and C Extraction

finFET Support in High-Precision C Extraction

iQuantus FS C Extraction (Advanced Nodes Layout EAD Only)

Viewing and Analyzing Parasitics

Viewing Mesh for Selected Nets

Comparing Parasitic Values for Multiple Nets

Using Automatic Update Mode

Distributed Computation of Extraction Process

Automatic submission of jobs for all nets to an LSF farm

Automatic submission of jobs for all nets to dedicated servers

Customized distributed computation of net groups using different job policies

Working with Job Policies

Setting Up a Job Policy

Using Distributed Processing Jobs

5

Performing Electromigration Checks and Fixing Violations

Running EM Analysis to Identify Violations

Verifying the Setup for EM Analysis

Running an EM Check

Running EM Checks with High Precision R and C Extraction

Viewing Current Density and Vectors

Viewing Voltage Drop

Identifying EM Hot Spots

Highlighting EM Violations

Running EM Checks on a CUSTOM Dataset

Using Custom Datasets for EM Checks

Creating User-Defined Custom Datasets

Saving CSV Templates for User-Defined Custom Datasets

Reloading and Updating User-Defined Custom Datasets

Viewing EM Information in the EAD Browser

Viewing Delta T Information

Viewing Electrical Information in the Layout Window

Using Info Balloons

Using Point-To-Point Info Balloons

Snapping Start and End Points to Existing Nodes

Displaying Info Balloons with Start and End Points from Different Layers

Displaying Resistance Paths Between the Start and End Points of an Info Balloon

Updating Info Balloons to Reflect Layout Edits

Saving Info Balloons to XML Files

Using Measurement Display

Highlighting and Fixing Violations in the Layout Window

Fixing Violations Using EM Driven Trunk Optimization

Important Point to Note

Optimizing EM Driven Trunks

Expanding Trunks to Fix EM Violations

Shrinking Oversized Trunks

Shrinking and Expanding Trunks

Running EM Analysis on Power Grids

Specifying the Source Current

Using the defaultCurrent Environment Variable

Using the CUSTOM Dataset

Running EM Analysis on the Scratch Cellview

Modifying the Original Layout

Running EM Analysis on the Original Grid

Specifying Mapping between Nets and Pin Layers for EM Check

Generating EAD Dataset

6

Introduction to EM Calculator

Opening the EM Calculator

EM Calculator Graphical User Interface (GUI)

EM Calculator Toolbar

User-Specified Fields

Working with the EM Calculator

Calculating EM Limits

Running What-If Analysis

Exporting EM Results

Loading EM Results

7

Resimulating Designs with Extracted Parasitics

Running Simulations with Layout Parasitics

Preparing the Parasitic Setup

Creating a Netlist Cellview with Layout Parasitics in Virtuoso Layout EAD

Creating a Netlist Cellview with Layout Parasitics in Virtuoso ADE Assembler

Creating a DSPF File with Layout Parasitics in Virtuoso Layout EAD

Running Simulations and Verifying Specifications

Comparing the Simulation Results

Using Extracted Parasitics to Run Spectre EM/IR Analysis

Using Parasitic Values from Multiple Sources

Setting the Source of a Parasitic Estimate to a Layout View

Creating Layout Stitching Estimates for a Cell

Running Advanced Simulation Runs to Improve Designs

Viewing and Updating Layout Parasitics in VSE XL

Important Points to Note

Viewing Parasitics

Probing Resistances for Nets, Terminals, or Instance Terminals Selected on Schematic

Probing Capacitance for Nets Selected on Schematic

Filtering the Coupling Caps Table by Layer

Finding a Specific Resistance Path

Extracting Parasitics

Viewing and Editing Constraints

Viewing and Editing the Max Resistance Constraint in the EAD Browser

Viewing and Editing the Max Capacitance Constraint in the EAD Browser

Viewing and Editing the Max Coupling Capacitance Constraint in the EAD Browser

Annotating Parasitics on the Schematic

Modifying Parasitics on the Schematic

Building Netlist to Run Simulations

Annotating Parasitics from Schematic EAD Browser

8

Quantus-Pegasus Integration for Partial Layouts

Creating Pegasus/Quantus Setup for Parasitics Extraction

Creating Process and Setup Files Manually

Extracting Parasitics from a Partial Layout

Extracting LDE Parameters

Viewing Log Files

A

Form Descriptions

EAD Setup Options

EAD Pegasus/Quantus Create Setup File Dialog Form

EAD Process Settings

EAD Process Settings – Corners

EAD Process Settings – Layer Mapping

EAD Process Settings – Vias

EAD Process Settings – Cell Shape Types

EAD Job Policy Editor

EAD Net Options

Parasitics & LDE Setup

P2T EM Optimization

The Pre-EM Setup Form

B

Environment Variables

createVoltageConstraints

customVoltageConstraintFunc

enableCustomVminVmaxCalc

useHierarchyLevel

iavgScaleFactor

skipLibListForDataset

vdrcPerfSigCount

vdrCsvDatasetDir

vdrCsvDatasetFileSuffix

vdrCsvDatasetNameSuffix

showOnlyTopLevelNets

warnOnCacheEdit

warnOnCacheSave

warnOnDatasetOverwrite

excludeCurrentsInCI

storeRelativePaths

enableWorstCaseDatasetForVoltages

expandIteratedInstancesForCurrents

expandIteratedInstancesForVoltages

individualInstCdfCallbacks

defaultJobPolicy

doAutoLayerMapping

excludedNetsExceptions

extractConnectivity

extractNetsWithConstraints

flattenOtherInstances

highlightNetShapes

includeEmptyNets

loadSubconductorLayers

processSettings

processStrappedMosfets

resistancePathLimit

stampNullNetTiles

showEstimatedResistance

autoDatasetCustomProc

autoDatasetDeviceLengthPropList

autoDatasetMacroProp

autoDatasetDeviceWidthPropList

autoDatasetDistributionMethod

adjustedCurrentMsgRelTol

customSHESetupFile

currentDensityMPVDefault

computeIRDropWhenLoadingSetup

checkResWidthAndEMLength

distributeTermCurrent

dynamicAnalysis

eadVerbosityLevel

emViolThresholdPercent

enableDynamicRead

enableSelfHeatingEffects

enableViaElseRule

forceSegmentTotal

ictemLayerMapFile

includeDeltaT_Margin

ignoreResistorLimit

metalRegionSearchExtent

odRegionSearchExtent

preloadWaveforms

preserveResistorCurrents

printAdjustedCurrents

resPathsResistorLimit

rmsMetalLineNumAC

rmsMetalLineNumDC

setTermNodeAsReference

skipViaStackMetalResistor

termPinLayersForEMCheck

useDatasetClipInfo

useDatasetTemperature

viaOverlapPercentage

writeEMResultsToOA

preEMCheckLayers

preEMDescendIntoPCell

preEMDetailReport

preEMViolThresholdPercent

minResistorCurrent

autoInjectionPointFile

autoInjectionPointDebug

capacitanceMethod

couplingCThreshold

coupleToBulkNets

dspfCouplingCapPrefix

dspfGroundCapPrefix

dspfResistorPrefix

dspfSubNodeDelimiter

dspfWriteInstances

dspfWriteSubNodes

enableErosionEffects

enableLoadingEffects

enableWbeEffects

enableWeeEffects

excludePolyDiffusionCap

extractDegenerateNets

extractLocalInterconnectVias

extractNetsWithOpens

extractNonOrthoNets

extractResOnDiffusion

extractionPrimitives

enableCapOnlyModels

fillPurposeNames

forceExtraction

hideDummyResistors

hierarchyLevels

hierarchyShapeType

insertResNodeLabelPurpose

instTermHierarchyLevels

instTermSuperconductive

maxResistorLength

netHierarchyLevels

nonTermDiffusionShapeType

recordCoupledCap

relativeCThreshold

gndCapScaleFactor

couplingCapScaleFactor

slottingPurposeNames

stackViaArrayHandling

skipPowerGround

supportSDRDynamicDataset

swapLithoBiasDirection

unusedInstTermShapeType

viaInstanceMode

viaShapesScanMode

warnOnLayerMapping

layoutEAD.solver

autoThreadsPerNetOverride

convergenceCThreshold

hpcMetalFillDefFileName

hprDisableViaClustering

hprStampDataFileName

includePolyFringingCap

modelNonGateFormingPolyCap

modelViaCapacitanceEffect

resistanceMeshDensity

resistanceMeshDensityFileName

resistanceMeshFileName

resistanceMesherThreadCount

resistanceMesherTimeOut

resistancePathThreshold

resistanceFieldFileName

showVoltageDropViolation

tileExtractorThreadCount

qrcTechFileName

qrcLayerSetupFileName

qrcCapgenFileName

autoHideParasiticHighlights

applyLayerFilterOnCanvasHighlight

capacitanceFixedSuffix

clickClickUpdateDelay

clickClickUseNetCache

detailedParasiticTables

emResultsShowAllResistors

emTableResultType

hideCheckLayerMapping

hideHPRCExtraction

fitToSelectedZoomScale

highlightSelectedNets

layerFilterOnEMCanvas

loadTablesOnDemand

includeSkippedNets

maxTooltipLength

parasiticHighlightColor

resistanceDisplay

displayP2PResistancePath

resistancePathsTableTimeout

saveStateOnClose

saveUserSpecificSetups

selectNetsInLayout

selectedParasiticHighlightColor

significantDigits

strikeOutDeletedDatasets

updateP2POnDrag

violationLevels

violationPacketStipple

violationTransparency

warnOnTemperatureMismatch

warnOnTemperatureOutOfRange

warnWhenEMDataSourceIsInvalid

warnWhenNoParasiticsForDSPF

loadStateOnOpen

enableEMCalculator

showEMPlannerWindow

showRecommendedTracks

showTracksWithoutWSP

useWSPGroupNames

EMFillStackedTrunksWithVias

EMAllowDRCViolations

EMOptimizationMode

EMTrunkStrandMode

EMTrunkTapering

C

Electrically Aware Design Functions

List of EAD-related OCEAN Commands

elecCreateDataSetCSVTemplate

elecDeleteDataSets

eadDeleteScratchLib

elecGetEnableEADMode

elecSetEnableEADMode

elecGetCurrentData

elecGetDataSetNames

elecGetDataSetParamsPropValue

elecMakeDefaultDatasetName

elecUpdateDataSetParamsPropValue

elecGetVoltageData

elecGetVsyncEnabled

elecSetVsyncEnabled

elecVdrCreateConstraints

elecVdrCreateDeltaV

eadAddNetsToNetGroup

eadCreateDataSetFromLayCSV

eadCreateDataSetFromSchCSV

eadCreateDataSetLayCSVTemplate

eadCreateNetGroup

eadDeleteNetGroup

eadExtractParasiticsForDesign

eadGetAllEMDatasets

eadGetNetsInNetGroup

eadGetTriggerDesc

eadGetLocCurrentLimit

eadPreEMSetUserStopCVList

eadRegisterCustomEMVariable

eadRemoveNetsFromNetGroup

eadRemoveParasitics

eadSetEMVariable

elecTransferDataSets

eadUnregTrigger

eadInitializeDesign

eadExtractParasitics

eadRemoveDesignParasitics

eadSaveSummaryTableToCSV

eadSetCurrentDataset

D

Generating an EAD Technology File

Generating an EAD Technology File

Example Scenarios of EAD Technology File Generation

Updating an EAD Technology File

EM Rule Support in EAD

Current Density (JMAX) Keywords

Rules for Defining EM Parameters

Rules for Specifying Via Area

EM Rule Selection Priority

Solvers for Generation of Capacitance Models

Guidelines for Using a Solver

⠀ X