Index
Symbols
_ (underscore), in identifiers
! (logical negation)
!= (not equal to)
- (binary minus)
- (unary minus)
? and : (conditional operator)
" (double quote character), displaying
( (left parenthesis)
groundSensitivity
inh_conn_def_value
inh_conn_prop_name
library_binding
passed_mfactor
supplySensitivity
(tab character), displaying
) (right parenthesis)
[ (left bracket), using to include end point in range
] (right bracket), using to include end point in range
@ (at-sign) operator
* (multiply)
/ (divide)
/* (slash, asterisk), as comment marker
// (double slash), as comment marker
/f
continuing macro text with
displaying
in escaped names
& (bitwise binary and)
&& (logical and)
% (modulo)
% (percent character), displaying
` (accent grave)
`default_nodetype compiler directive
`define compiler directive
syntax
tested by `ifdef compiler directive
`ifdef compiler directive
`include compiler directive
`resetall compiler directive
`timescale compiler directive
,
`undef compiler directive
^ (bitwise binary exclusive OR)
^~ (bitwise binary exclusive NOR)
+ (binary plus)
+ (unary plus)
< (less than)
<+ (branch contribution operator)
<< (shift bits left)
<= (less than or equal)
== (logical equals)
> (greater than)
>= (greater than or equal)
>> (shift bits right)
| (bitwise binary or)
|| (logical or)
~ (bitwise unary negation)
~^ (bitwise binary exclusive nor)
$ (dollar sign), in identifiers
$abstime function
$display
$display task
,
$dist_chi_square function
$dist_erlang function
$dist_exponential function
$dist_normal function
$dist_poisson function
$dist_t function
$dist_uniform function
$fclose task
$fdebug
$fdisplay
$fdisplay task
$ferror
$fgets
$fmonitor
$fopen task
special formatting commands for
$fseek
$fstrobe
$fstrobe task
,
$ftell
$fwrite
analog operator
$limit function
$random simulator function
$realtime function
$rewind
$strobe
description
,
example of use
$write
A
A
above event
abs function
absdelta function
absolute function
used to evaluate convergence
absolute value
absolute value model
in convergence
description
requirements for
ac_stim simulator function
accent grave (`), compiler directive designation
description
requirements for
name taken from discipline
syntax
using in branch contribution statement
using to obtain values
using to set values
acos function
acosh function
8-bit differential nonlinearity measurement
8-bit integral nonlinearity measurement
definition
8-bit
8-bit (ideal)
8-bit differential nonlinearity measurement
8-bit integral nonlinearity measurement
adder
adder model
four numbers
full
half
adder, 4 numbers
AM demodulator
AM demodulator model
AM modulator
AM modulator model
ammeter (current meter)
ammeter model
amplifier
amplifier model
current deadband
deadband differential
differential
limiting differential
logarithmic
operational
sample-and-hold (ideal)
variable gain differential
voltage deadband
voltage-controlled variable-gain
analog behavior, defining with control flow
multiple blocks not allowed
placement
analog components
analog events
to
absdelta
cross
detecting
detecting multiple
final_step
initial_step
timer
analog multiplexer
analog multiplexer model
analog operators
$limexp
not allowed in for loop
listed
not allowed in repeat loop
restrictions on
using in looping constructs
not allowed in while loop
analog systems
analog-to-digital converter
example
model, 8-bit
model, 8-bit (ideal)
model, 8-bit differential nonlinearity measurement
model, 8-bit integral nonlinearity measurement
detecting first time step in
detecting last time step in
analysis function
analysis types
analysis-dependent functions
AND gate
AND gate model
arc-cosine function
arc-hyperbolic cosine function
arc-hyperbolic sine function
arc-hyperbolic tangent function
arc-sine function
arc-tangent function
arc-tangent of x/y function
arguments represented as
as parameter values
assignment operator for
of integers, declaring
of parameters
of reals, declaring
of wreals, declaring
asin function
asinh function
assignment operator, procedural
assignment statement
assignment statement, indirect branch
associated reference directions
association order, of operators
atan function
atan2 function
atanh function
attenuator model
abstol
access
blowup
ddt_nature
huge
idt_nature
requirements
units
user-defined
using to define base nature
audio source
audio source model
B
B
backward compatibility
declaring
description
basic components
behavioral characteristics, defining with internal nodes
behavioral description, definition
behavioral model, definition
bidirectional ports
binary operators
binding, run-time, definition
bit error rate calculator model
bitwise operators
AND
exclusive NOR
exclusive OR
inclusive OR
unary negation
blanks, as white space
block comment
analog
definition
blowup attribute, description
bound_step simulator function
braces, meaning of in syntax
brackets ( [ ] )
branch contribution statement
compared with procedural assignment statement
cumulative effect of
evaluation of
incompatible with indirect branch assignment
syntax
branch data type
branch terminals
declaring
definition
flow, default value for
reference directions for
switch, creating
switch, defined
switch, equivalent circuit model for
values associated with
built-in primitives
buses
C
c or C format character
capacitor model
untrimmed
case construct
case statement
CDF, definition
channel_descriptor, returned by $fopen
charge meter model
charge pump model
definition
chi-square distribution function
open
short
circular integrator operator
example
using
hard current
hard voltage
soft current
soft voltage
clocked JK flip-flop model
closing a file
2-bit
4-bit
comments
in modules
in text macros
comparator
example
model
of disciplines
,
lag
lead
lead-lag
compilation, conditional
`default_nodetype
`define
`ifdef
`resetall
`timescale
,
`undef
designated by accent grave (`)
list of
resetting to default values
definition
conditional compilation
conditional operator
conditional statement
digital islands
driver-receiver segregation
example
rules for
connecting the ports of module instances
conservative discipline
conservative systems
conservative disciplines used to define
defined
values associated with
constant expression
constant power sink model
integer
real
string, used as parameters
constitutive relationships
definition
,
use in nodal analysis
case
looping
procedural control
contribution statements, format
,
control components
definition
describing behavior with
controlled integrator model
controlled sources
proportional
proportional derivative
proportional integral
proportional integral derivative
conventions, typographical
convergence
conversion specifications
converting real numbers to integers
core model, magnetic
cos function
cosh function
cosine function
cross event
syntax
cube model
cubic root model
access function
accessing branch current
accessing the current of an out-of-module port
flow into module through a port
current analysis type, determining
hard
soft
current deadband amplifier model
current meter model
current-controlled
voltage-controlled
current-controlled current source
,
current-controlled current source model
current-controlled voltage source
,
current-controlled voltage source model
D
d or D format character
8-bit
8-bit (ideal)
8-bit differential nonlinearity measurement
8-bit integral nonlinearity measurement
DAC, definition
damper model
branch
discipline
integer number
nature
parameter
real number
value returned by idt during
DC motor model
ddt operator (time derivative)
,
description
requirements for
current
voltage
deadband differential amplifier model
deadband model
decider model
decimal logarithm function
decimator model
definition
global, definition
.def filename extension
default values, required for parameters
`default_nodetype compiler directive
`define compiler directive
syntax
overriding parameter values with
precedence of
delay operator
delaying continuously valued waveform
delta probe model
8-bit PCM
AM
FM
PM
QAM 16-ary
QPSK
derivative controller model
proportional
proportional integral
derivative, time
derived nature
describing a system
for integers
for net disciplines
for parameter declarations
for reals
differential amplifier (opamp)
differential amplifier model
deadband
limiting
variable gain
differential signal driver
differential signal driver model
differentiator model
digital islands
digital phase locked loop model
digital to analog converter example
digital voltage controlled oscillator model
digital-to-analog converter model
8-bit
8-bit (ideal)
8-bit differential nonlinearity measurement
8-bit integral nonlinearity measurement
diode model
Schottky
direction of ports, declaring
directions, reference
See compiler directives
disciplines
compatibility of
to
conservative
declaring
definition
empty
,
empty, declaring terminals with
scope of
signal-flow
announcing
in switch branches
not required for switch branches
syntax
discrete-time finite difference approximation
$display task
,
information
results
$dist_chi_square function
$dist_erlang function
$dist_exponential function
$dist_normal function
$dist_poisson function
$dist_t function
$dist_uniform function
chi-square
Erlang
exponential
gaussian
normal
Poisson
Student’s T
uniform
divider model
DNL, definition
dollar signs, in identifiers
of hyperbolic functions
of mathematical functions
of trigonometric functions
differential signal
driver_count function
driver_state function
driver_strength function
driver-receiver segregation
definition
definition
number of, determining
numbering system for
strength contribution of, determining
value contribution of, determining
D-type flip-flop model
dynamic expression, definition
declaring
E
E
e or E format character
8-bit parallel register model
8-bit serial register model
electromagnetic components
electromagnetic relay
electromagnetic relay model
element, definition
else statement, matching with if statement
compatibility of
definition
example
predefined (wire)
endmodule keyword
,
entering interactive Tcl mode
enumerated values, as parameter values
environment functions
Erlang distribution
Erlang distribution function
error calculation block
error calculation block model
escaped names
defined
using keywords as
event OR operator
detecting analog
detecting and using
events, analog
to
$strobe formatting
analog-to-digital converter
ideal relay
ideal sampled data integrator
inductor
RLC circuit
sources and probes
voltage deadband amplifier
exclude keyword
exiting to the operating system
exp function
exponential distribution function
exponential function
exponential function model
exponential function, limited
constant
definition
dynamic, definition
short circuiting of
F
F
f or F format character
open circuit
short circuit
$fclose task
$fdisplay task
closing
including at compilation time
opening
writing to
files, working with
slew
transition
final_step event
find event probe
find event probe model
find slope
find slope model
finite-difference approximation
flicker_noise function
flicker_noise simulator function
clocked JK
D-type
JK-type
RS-type
toggle-type
trigger-type
default value for
definition
in a conservative system
probes, definition
sources, definition
sources, equivalent circuit model for
sources, switching to potential sources
See Kirchhoff’s Laws, Flow Law
flow-to-value converter model
FM demodulator
FM demodulator model
FM modulator model
$fopen task
for loop statement
for statement
formatting output
four-number adder model
four-number subtractor model
frequency meter model
frequency-phase detector model
$fstrobe task
,
full adder model
full subtractor model
full wave rectifier model, two phase
functional blocks
access
defining
environment
mathematical
user-defined
G
G
g or G format character
gain block
gap model, magnetic
gaussian distribution
gearbox model
generate statement
generating random numbers
generating random numbers in specified distributions
genvars
global declarations, definition
as assumed branch terminal
potential of
groundSensitivity and supplySensitivity attributes
grouping parameter overrides
H
H
h or H format character
half adder model
half subtractor model
half wave rectifier model, two phase
hard current clamp model
hard voltage clamp model
hierarchical name, displaying
parameter override precedence and
higher order systems
huge attribute, description
hyperbolic cosine function
hyperbolic functions
hyperbolic sine function
hyperbolic tangent function
hypot function
hypotenuse function
hysteresis model, rectangular
I
IC analysis, value returned by idt during
ideal relay example
ideal sampled data integrator example
identifiers
example
using in feedback configuration
description
requirements for
example
using
`ifdef compiler directive
ignored code, restrictions on
impedance meter model
implicit branches
implicit models
`include compiler directive
indirect branch assignment statement
inductor model
module describing
untrimmed
-inf (negative infinity)
infinity, indicating in a range
inh_conn_def_value attribute
inh_conn_prop_name attribute
definition
supply sensitivity attributes, with
inherited_mfactor attribute
initial_step event
syntax
connecting with ports
,
creating
creating and naming
definition
overriding parameter values in
analog primitives
analog primitives that use array valued parameters
modules that use unsupported parameter types
definition
of non-Verilog-A modules
See module instantiation statement example
syntax
attributes for
constants
data type
declaring
numbers
,
range allowed in Verilog-A
integral controller model, proportional
integral derivative controller model, proportional
integral, time
integration and differentiation with analog signal, using
integrator
integrator model
controlled
saturating
switched capacitor
interconnection relationships
interface declarations, example
for higher order derivatives
in higher order systems
use
internal nodes in behavioral definitions, using
internal nodes in higher order system, using
internal nodes in modules, using
interpolating with table models
J
JK-type flip-flop model
K
keywords, list of
Kirchhoff’s Laws
definition
illustrated
use in nodal analysis
Potential Law
,
L
L
lag compensator model
numerator-denominator form
numerator-pole form
s-domain filters
zero-denominator form
zero-pole form
laplace_nd Laplace transform
laplace_np Laplace transform
laplace_zd Laplace transform
laplace_zp Laplace transform
last_crossing simulator function
improving accuracy of
setting direction for
,
syntax
See Kirchhoff’s Laws
lead compensator model
lead-lag compensator model
left justifying output
level shifter model
,
level, definition
library_binding attribute
$limexp analog operator
limited exponential function
limiting differential amplifier model
linear conductor model
linear resistor model
ln function
declaring
log function
decimal
natural
logarithmic amplifier model
logic components
LPF, definition
M
M
m factor (multiplicity factor)
example of using
using
See text macros
magnetic components
magnetic core
magnetic core model
magnetic gap
magnetic gap model
magnetic winding
magnetic winding model
mapping instance ports to module ports
mapping ports with ordered lists
mass model
math domain errors, controlling
mathematical components
mathematical functions
maximum (max) function
measure components
offset
slew rate
,
mechanical damper
mechanical damper model
mechanical mass
mechanical mass model
mechanical restrainer
mechanical restrainer model
mechanical spring
mechanical spring model
mechanical systems
minimum (min) function
mixed conservative and signal-flow systems
mixed-signal components
mixer
mixer model
,
library of samples
8-bit PCM
AM
FM
PM
QPSK
quadrature amplitude 16-ary
module instantiation statement
overrides by, subordinate to defparam
module keyword
defining
behavioral description
capacitor example
child, definition
declaring
definition
,
format
hierarchy of
instantiating in other modules
instantiation statement, example
,
interface declarations
interface, declaring
internal nodes in
name
using nodes in
non-Verilog-A
overview
RLC circuit example
,
top-level
transformer example
voltage deadband amplifier example
MOS thin-film transistor
MOS thin-film transistor model
MOS transistor (level 1)
MOS transistor model (level 1)
DC
three-phase
multiplexer model
multiplier model
N
N
N JFET transistor model
mapping instance nodes with
rules for, when mapping instance nodes
named branches
names, escaped
NAND Gate
NAND gate model
natural log function model
natural logarithm function
natures
access function for
attributes
base, declaring
base, definition
binding with potential and flow
declaring
definition
deriving from other natures
requirements for
net disciplines
description attribute for
as white space
displaying
definition
used to evaluate systems
nodal analysis
node data type
nodes
assumed to be infinitely small
connecting instances with
declaring
definition
identifier, used in name pair
instance, mapping with name pairs
matching sizes required when connected
as module ports
reference, definition
reference, potential of
scalar
values associated with
vector, declaring
vector, definition
ways of using
flicker_noise
noise_table
noise source model
noise_table function
noise_table simulator function
nonlinearities, announcing and handling
NOR Gate
NOR gate model
normal (gaussian) distribution
normal distribution function
NOT Gate
NOT gate model
NPN bipolar junction transistor model
NR method, definition
numbers
numerator-denominator Laplace transforms
numerator-denominator Z-transforms
numerator-pole Laplace transforms
numerator-pole Z-transforms
O
o or O format character
offset measurement
offset measurement model
one-line comment
opamp model
,
open circuit fault
open circuit fault model
file
operational amplifier model
operators
to
analog
association of
binary
bitwise
circular integrator
delay
idtmod
precedence
precedence of
,
ternary
time derivative
time integral
unary
or (event OR)
OR Gate
OR gate model
OR operator, event
order of evaluation, changing
ordered lists, mapping nodes with
ordinary identifiers
digital voltage controlled
voltage-controlled
out-of-module current access
overriding parameter values
, ?? to
by name
from the instantiation statement
grouping override statements together
in instances
precedence rules
analog events
operators
overview of probes and sources
P
P
parallel register model, 8-bit
parallel register, 8-bit
parameters
,
aliases
array values as
arrays of
attributes for
changing during compilation
must be constants
declaration, definition
declaring
default value required
definition
dependence on other parameters
enumerated values as
names
overriding values with defparam statement
overriding values with module instantiation statement
permissible values for, specifying
string values as
type specifier optional
type, specifying
changing evaluation order with
using to exclude end point in range
passed_mfactor attribute
PCM demodulator model, 8-bit
PCM demodulator, 8-bit
PCM modulator model, 8-bit
PCM modulator, 8-bit
pending value of a driver
period of signal, example of calculating
permissible values for parameters, specifying
permissible values, specifying
model
phase locked loop model
digital
PLL model
digital
PLL, definition
PM demodulator
PM demodulator model
PM modulator
PM modulator model
Poisson distribution
Poisson distribution function
polynomial
polynomial model
port branches
monitoring flow with
port bus, defining
port connection rules
port declaration example
port direction
port type
ports
bidirectional
declaring
defining by listing nodes
direction, declaring
instance, mapping to defining module ports
names, using to connect instances
type of, declaring
undeclared types as
definition
in electrical systems
probes
sources, definition
sources, equivalent circuit model for
sources, switching to flow sources
potential law.
See Kirchhoff’s Laws
power (pow) function
power consumption, specifying
power electronics components
power function model
power meter model
power sink model, constant
precedence of operators
,
for overriding parameter values
definition
instantiating in Verilog-A modules
delta
find event
probes
definition
,
flow
potential
reasons for using
procedural assignment statement
procedural assignment statements in the analog block
procedural control constructs
proportional controller model
proportional derivative controller
proportional derivative controller model
proportional integral controller model
proportional integral derivative controller model
pump model, charge
Q
Q (charge) meter model
QAM 16-ary demodulator model
QPSK demodulator model
QPSK modulator model
,
QPSK, definition
quadrature amplitude 16-ary modulator model
quadrature phase shift key demodulator model
quadrature phase shift key modulator model
quantizer model
querying the simulation environment
R
R
random bit stream generator model
random numbers, generating
$random simulator function
for integer numbers
for real numbers
rate of change, controlling with slew filter
reading from a file
scale factors for
syntax
real numbers
,
attributes for
converting to integers
declaring
range permitted
reciprocal model
rectangular hysteresis model
reference directions
associated
definition
illustrated
reference nodes
definition
potential of
relative tolerance
example
model, electromagnetic
reltol (relative tolerance)
repeat loop statement
repeat statement
repeater
repeater model
`resetall compiler directive
resistor model
self-tuning
untrimmed
restrainer model
restrictions on using analog operators
rise times, setting default for
RLC Circuit
RLC circuit
,
RLC circuit model
rms, definition
road model
RS-Type Flip-Flop
RS-type flip-flop model
rules, for connecting instances
run time binding, definition
S
S
s or S format character
sample-and-hold amplifier model (ideal)
sampler model
saturating integrator model
scalar node
scale factors, for real constants
Schottky Diode
Schottky diode model
definition
named block defines new
of discipline identifiers
rules
self-tuning resistor
self-tuning resistor model
semiconductor components
sensitivity attributes
sequential block statement
serial register model, 8-bit
serial register, 8-bit
shifter model, level
,
short circuit fault
short circuit fault model
short circuiting, of expressions
sigma-delta converter (first-order)
sigma-delta converter model (first order)
signal driver model, differential
signal statistics probe
signal statistics probe model
,
,
modifying with branch contribution statement
obtaining and setting
signal values, obtaining and setting
signal-flow discipline
signal-flow systems
modeling supported by Verilog-A
signal-flow disciplines used to define
signed number
signed number model
signs, requesting in output
simple implicit diode
simple implicit diode model
simulating a system
simulation environment, querying
simulation time, obtaining current
simulator flow
$dist_chi_square
$dist_erlang
$dist_exponential
$dist_normal
$dist_poisson
$dist_t
$dist_uniform
$random
ac_stim
analysis
bound_step
discontinuity
flicker_noise
last_crossing
limiting function
noise_table
white_noise
sin function
sine function
single shot model
sinh function
sink model, constant power
swept, model
variable frequency, model
sinusoidal stimulus, implementing with ac_stim
sinusoidal waveforms, controlling with slew filter
sizes, of connected terminals and nodes
slew filter
slew rate measurement model
,
small-signal AC sources
small-signal noise sources
smoothing piecewise constant waveforms
soft current clamp model
soft voltage clamp model
audio
noise
swept sinusoidal
three-phase
variable frequency sinusoidal
sources
controlled
current-controlled current
current-controlled voltage
definition
,
flow
linear conductor model
linear resistor model
potential
reasons for using
RLC circuit model
simple implicit diode model
unassigned
voltage-controlled current
voltage-controlled voltage
displaying or printing
white
special characters
special characters, displaying
primitives, instantiating in Verilog-A modules
spring model
sqr function
square brackets, meaning of, in syntax
square model
square root function
square root model
standard mathematical functions
strength contribution of drivers, determining
string
strings, as parameter values
description
,
example
structural definitions, definition
structural descriptions, undeclared port types in
Student’s T distribution
Student’s T distribution function
subtractor model
four numbers
full
half
supplySensitivity and groundSensitivity attributes
svcvs primitive
model
switch
branch, creating
branches, value retention for
model
switched capacitor integrator model
definition operator (::=)
typographical conventions for
conservative
definition
T
as white space
displaying
table model file format
tan function
tangent function
tanh function
telecommunications components
temperature, obtaining current ambient
branch
ternary operator
defining
restrictions on
undefining
thermal voltage, obtaining
third-order polynomial function model
motor model
source model
thyristor model
time derivative operator
time integral operator
time step, bounding
time-points, placed by transition filter
timer event
timer function
`timescale compiler directive
not reset by `resetall directive
syntax
,
toggle-type flip-flop model
absolute
relative
transformer model, two-phase
transient analysis
MOS (level 1)
MOS thin-film
N JFET
NPN bipolar junction
not recommended for smoothly varying waveforms
syntax
transmission channel model
triangular wave source, example
trigger-type flip-flop model
trigonometric and hyperbolic functions
trigonometric functions
troubleshooting loops of rigid branches
two-phase transformer model
type specifier, optional on parameter declaration
U
unary operators
defined
precedence of
unary reduction operators
unassigned sources
`undef compiler directive
undefining text macros
underscore, in identifiers
uniform distribution
uniform distribution function
description
for integers
for parameters
for reals
requirements for
units (scale factors) for real numbers
capacitor model
inductor model
resistor model
user-defined functions
calling
declaring
declaring analog
restrictions on
V
V
value contribution of drivers, determining
value retention for switch branches
value-to-flow converter model
variable frequency sinusoidal source model
variable-gain amplifier model, voltage-controlled
variable-gain differential amplifier model
VCO model
VCO, definition
vector nodes, definition
vectors, arguments represented as
definition
language overview
vertical bars, meaning of, in syntax
access function
accessing potential across a branch
accessing potential difference
hard
soft
voltage deadband amplifier
model
voltage meter model
current-controlled
voltage-controlled
voltage-controlled current source
voltage-controlled current source model
voltage-controlled oscillator
model
model, digital
voltage-controlled variable-gain amplifier model
voltage-controlled voltage source
voltage-controlled voltage source model
W
wheel
wheel model
while loop statement
while statement
white space
white_noise simulator function
winding model, magnetic
wire (predefined empty discipline)
wreal nets
writing to a file
X
XNOR Gate
XNOR gate model
XOR Gate
XOR gate model
Z
Z (impedance) meter
Z (impedance) meter model
zero crosses, detecting
zero-denominator Laplace transforms
zero-denominator Z-transforms
zero-pole Laplace transforms
zero-pole Z-transforms
zi_nd Z-transform filter
zi_np Z-transform filter
zi_zd Z-transform filter
zi_zp Z-transform filter
Z-transform filters
introduction
numerator-denominator form
numerator-pole form
zero-denominator form
zero-pole form
Return to top
